SNLS696A April 2021 – May 2021 TSER953
CSI-2 packet header contains 6-bit Error Correction Code (ECC). ECC in the 32-bit long packet header can be corrected when there is a 1-bit error and detected when there is a 2-bit error. This feature is added to monitor the CSI-2 input for ECC 1-bit error correction. When ECC error is detected, ECC error detection register will be set and an alarm indicator bit can be sent to the deserializer to indicate the ECC error has been detected. A register control can be used to either enable or disable the alarm.