SNLS696A April 2021 – May 2021 TSER953
An optional at-speed Built-In Self Test (BIST) feature supports high-speed serial link and back channel testing without external data connections. This is useful in the prototype stage, equipment production, in-system test, and system diagnostics.
BIST mode is enabled by the BIST configuration register 0xB3 on the deserializer, and should only run in the synchronous mode. When BIST is activated at the deserializer, a BIST enable signal is sent to the serializer through the back channel. The serializer outputs a continuous stream of a pseudo-random sequence and drives the link at speed. The deserializer detects the test pattern and monitors the pattern for errors. The serializer also tracks errors indicated by the CRC fields in each back channel frame. While the lock indications are required to identify the beginning of proper data reception, the best indication of any link failures or data corruption is the content of the error counter in the BIST_ERR_COUNT register 0x57 for each RX port on the deserializer side. BIST mode is useful in the prototype stage, equipment production, in-system test, and system diagnostics.