SLUSDV7B October   2019  – March 2021

PRODUCTION DATA

1. Features
2. Applications
3. Description
4. Revision History
5. Pin Configuration and Function
6. Specifications
7. Parameter Measurement Information
8. Detailed Description
1. 8.1 Overview
2. 8.2 Functional Block Diagram
3. 8.3 Feature Description
1. 8.3.1 Power Supply
2. 8.3.2 Input Stage
3. 8.3.3 Output Stage
4. 8.3.4 Protection Features
4. 8.4 Device Functional Modes
9. Application and Implementation
1. 9.1 Application Information
2. 9.2 Typical Application
10. 10Power Supply Recommendations
11. 11Layout
12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

• DWY|6

9.2.2.2 Gate Driver Output Resistor

The external gate-driver resistors, RG(ON) and RG(OFF) are used to:

1. Limit ringing caused by parasitic inductances and capacitances
2. Limit ringing caused by high voltage or high current switching dv/dt, di/dt, and body-diode reverse recovery
3. Fine-tune gate drive strength, specifically peak sink and source current to optimize the switching loss
4. Reduce electromagnetic interference (EMI)

The output stage has a pull up structure consisting of a P-channel MOSFET and an N-channel MOSFET in parallel. The combined peak source current is 4.5 A Use Equation 1 to estimate the peak source current as an example.

Equation 1.

where

• RGON is the external turnon resistance.
• RGFET_Int is the power transistor internal gate resistance, found in the power transistor data sheet. We will assume 0Ω for our example
• IOH is the peak source current which is the minimum value between 4.5A, the gate-driver peak source current, and the calculated value based on the gate-drive loop resistance.
• VGDF is the forward voltage drop for each of the diodes in series with RGON and RGOFF. The diode drop for this example is 0.7 V.

In this example, the peak source current is approximately 1.7A as calculated in Equation 2.

Equation 2.

Similarly, use Equation 3 to calculate the peak sink current.

Equation 3.

where

• RGOFF is the external turnoff resistance.
• IOL is the peak sink current which is the minimum value between 5.3A, the gate-driver peak sink current, and the calculated value based on the gate-drive loop resistance.

In this example, the peak sink current is the minimum of 5.3A and Equation 4.

Equation 4.

The diodes shown in series with each, RGON and RGOFF, in Figure 9-1 ensure the gate drive current flows through the intended path, respectively, during turn-on and turn-off. Note that the diode forward drop will reduce the voltage level at the gate of the power switch. To achieve rail-to-rail gate voltage levels, add a resistor from the VOUT pin to the power switch gate, with a resistance value approximately 20 times higher than RGON and RGOFF. For the examples described in this section, a good choice is 100 Ω to 200 Ω.

Note:

The estimated peak current is also influenced by PCB layout and load capacitance. Parasitic inductance in the gate-driver loop can slow down the peak gate-drive current and introduce overshoot and undershoot. Therefore, TI strongly recommends that the gate-driver loop should be minimized. Conversely, the peak source and sink current is dominated by loop parasitics when the load capacitance (CISS) of the power transistor is very small (typically less than 1 nF) because the rising and falling time is too small and close to the parasitic ringing period.