SLUSBL5A February   2015  – June 2019 UCC28730


  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Simplified Schematic
      2.      Zero-Power Input Consumption at No-Load
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Detailed Pin Description
        1. VDD (Device Bias Voltage Supply)
        2. GND (Ground)
        3. HV (High Voltage Startup)
        4. DRV (Gate Drive)
        5. CBC (Cable Compensation)
        6. VS (Voltage Sense)
        7. CS (Current Sense)
      2. 7.3.2 Primary-Side Regulation (PSR)
      3. 7.3.3 Primary-Side Constant Voltage Regulation
      4. 7.3.4 Primary-Side Constant Current Regulation
      5. 7.3.5 Wake-Up Detection and Function
      6. 7.3.6 Valley-Switching and Valley-Skipping
      7. 7.3.7 Startup Operation
      8. 7.3.8 Fault Protection
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. Stand-By Power Estimate
        2. Input Bulk Capacitance and Minimum Bulk Voltage
        3. Transformer Turns Ratio, Inductance, Primary-Peak Current
        4. Transformer Parameter Verification
        5. Output Capacitance
        6. VDD Capacitance, CVDD
        7. VS Resistor Divider, Line Compensation, and Cable Compensation
        8. VS Wake-Up Detection
      3. 8.2.3 Application Curves
    3. 8.3 Do's and Don'ts
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
      2. 11.1.2 Device Nomenclature
        1.  Capacitance Terms in Farads
        2.  Duty-Cycle Terms
        3.  Frequency Terms in Hertz
        4.  Current Terms in Amperes
        5.  Current and Voltage Scaling Terms
        6.  Transformer Terms
        7.  Power Terms in Watts
        8.  Resistance Terms in Ω
        9.  Timing Terms in Seconds
        10. DC Voltage Terms in Volts
        11. AC Voltage Terms in Volts
        12. Efficiency Terms
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Fault Protection

The UCC28730 provides comprehensive fault protection. The protection functions include:

  1. Output Overvoltage
  2. Input Undervoltage
  3. Internal Overtemperature
  4. Primary Overcurrent fault
  5. CS-pin Fault
  6. VS-pin Fault

A UVLO reset and restart sequence applies to all fault-protection events.

The output-overvoltage function is determined by the voltage feedback on the VS pin. If the voltage sample of VS exceeds 4.6 V for three consecutive switching cycles, the device stops switching and the internal current consumption becomes IFAULT which discharges the VDD capacitor to the UVLO-turn-off threshold. After that, the device returns to the start state and a start-up sequence ensues.

Current into the VS pin during the MOSFET on time determines the line-input run and stop voltages. While the VS pin clamps close to GND during the MOSFET on time, the current through RS1 is monitored to determine a sample of VBULK. A wide separation of the run and stop thresholds allows clean start-up and shut-down of the power supply with line voltage. The run-current threshold is 225 µA and the Stop-current threshold is 80 µA. The input AC voltage to run at start-up always corresponds to the peak voltage of the rectified line, because there is no loading on CBULK before start-up. The AC input voltage to stop varies with load since the minimum VBULK depends on the loading and the value of CBULK. At maximum load, the stop voltage is close to the run voltage, but at no-load condition the stop voltage can be approximately 1/3 of the run voltage.

The UCC28730 always operates with cycle-by-cycle primary-peak current control. The normal operating range of the CS pin is 0.74 to 0.249 V. An additional protection occurs if the CS pin reaches 1.5 V after the leading-edge blanking interval for three consecutive cycles, which results in a UVLO reset and restart sequence.

Normally at initial start-up, the peak level of the primary current of the first four power cycles is limited to the minimum VCST(min). If the CS input is shorted or held low such that the VCST(min) level is not reached within 4 µs on the first cycle, the CS input is presumed to be shorted to GND and the fault protection function results in a UVLO reset and restart sequence. Similarly, if the CS input is open, the internal voltage is pulled up to 1.5 V for three consecutive switching cycles and the fault protection function results in a UVLO reset and restart sequence.

The internal overtemperature-protection threshold is 165°C. If the junction temperature reaches this threshold, the device initiates a UVLO-reset cycle. If the temperature is still high at the end of the UVLO cycle, the protection cycle repeats.

Protection is included in the event of component failures on the VS pin. If complete loss of feedback information on the VS pin occurs, the controller stops switching and restarts.