SLUSBL5A February 2015 – June 2019 UCC28730
PRODUCTION DATA.
A capacitor is required on VDD to provide:
Generally, the value to satisfy (3) also satisfies (2) and (1), however the value for (1) may be the largest if the converter must provide high output current at a voltage below V_{OCC} during power up.
The capacitance on VDD needs to supply the device operating current until the output of the converter reaches the target minimum operating voltage in constant-current regulation, V_{OCC}. At that point, the auxiliary winding can sustain the bias voltage to the UCC28730 above the UVLO shutdown threshold. The total current available to charge the output capacitors and supply an output load and is the constant-current regulation target, I_{OCC}.
Equation 25 assumes that all of the output current of the flyback is available to charge the output capacitance until the minimum output voltage is achieved. For margin, there is an estimated 1 mA of average gate-drive current added to the run current and 1 V added to the minimum VDD.
At light loads, the UCC28730 enters a Wait-state between power cycles to minimize bias power and improve efficiency. Equation 26 estimates the minimum capacitance needed to obtain a target maximum ripple voltage on VDD (V_{VDD(maxΔ)} < 1 V, for example) during the Wait state, which occurs at the lowest possible switching frequency.
Choose the largest value of the previous C_{VDD} calculations for the minimum VDD capacitance.