JAJSJT8C May 2020 – June 2021 TPS543620
If an application requires synchronizing to a SYNC clock but the clock is unavailable before the device is enabled, a high impedance buffer is recommended to ensure proper detection of the RFSEL value. Figure 7-5 shows the recommended implementation. The leakage current into the buffer output must be less than 5 µA to ensure proper detection of the RFSEL value. Power the buffer from the BP5 output of the device to ensure its VCC voltage is available and the buffers output is high impedance before the device tries to detect the RFSEL value. When powering the buffer from the BP5 pin, the external load on the BP5 pin must be less than 2 mA.