JAJSJT8C May 2020 – June 2021 TPS543620
A 0.1-µF ceramic capacitor must be connected between the BOOT and SW pins for proper operation. The capacitor must be rated for at least 10-V to minimize DC bias derating.
A resistor can be added in series with the BOOT capacitor to slow down the turnon of the high-side MOSFET and rising edge overshoot on the SW pin. This comes with the trade off of more power loss and lower efficiency. As a best prectice, include a 0-Ω placeholder in all prototype designs in case parasitic inductance in the PCB layout results in more voltage overshoot at the SW pin than is normal. This helps keep the voltage within the ratings of the device and reduces the high frequency noise on the SW node. The recommended BOOT resistor value to decrease the SW pin overshoot is 2.2 Ω.