JAJSDF8B March 2017 – July 2019 LMK04616
PRODUCTION DATA.
The STARTUP_CFG Register provides control of the device operation at startup. Back to Register Map.
BIT NO. | FIELD | TYPE | RESET | DESCRIPTION |
---|---|---|---|---|
[7:6] | RSRVD | - | - | Reserved. |
[5] | OUTCH_MUTE | RW | 0 | Output Channel Mute. When OUTCH_MUTE is 1 the output drivers are disabled until the PLL's have locked. |
[4] | CLKINBLK_LOSLDO_EN | RW | 1 | Enable LOS LDO during the startup sequence. |
[3] | CH8TO15EN | RW | 1 | Enable Channels 8 to 15 during the startup sequence. |
[2] | CH0TO7EN | RW | 1 | Enable Channels 0 to 7 during the startup sequence. |
[1] | PLL2EN | RW | 1 | Activate PLL2 during the startup sequence. |
[0] | PLL1EN | RW | 1 | Activate PLL1 during the startup sequence. |