For digital circuits, there are three major noise sources as shown in Figure 6-2, which are the cause of EMI issues. The first is the voltage signal. As digital circuits process information by switching between high and low voltage states on signal lines, this generates signal transitions that decompose into discrete harmonic components across a broad frequency spectrum. The second is the signal current. During switching events, transient currents flow through signal lines as gate capacitance charges and discharges. The third is the short-circuit current. In CMOS digital ICs, a short-circuit current spike occurs when both PMOS and NMOS transistors briefly conduct simultaneously during logic transitions. This transient current flows directly between power and ground.

For the signal line noise caused by the voltage signal noise and single current noise, use an RC filter to improve the EMI. For the power line noise caused by short-circuit current, use decoupling capacitors to help improve the EMI.

The issues to highlight are the decoupling capacitors near MSPM0 power pins and Vcore pins. For the decoupling capacitors, TI recommends a combination of a 10μF and a 0.1μF low-ESR ceramic decoupling capacitor to the VDD and VSS pins. Higher-value capacitors can be used but can impact supply rail ramp-up time. Decoupling capacitors must be placed as close as possible to the pins that the capacitors decouple (within a few millimeters). Table 6-2 shows the impacts of improper PCB design of the power supply part, and all increase emission noise.

The impedance of a capacitor is different across the frequency as shown in Figure 6-3. Normally, 1uF capacitors can cover approximately 3-30MHz. The 0.1uF capacitors can cover approximately 6-60MHz. The 0.01uF capacitors can cover approximately 30-300MHz. The 1nF capacitors can cover approximately 60-600MHz. Users can select more capacitors with different capacitance to cover the target frequency range. Capacitors with a smaller capacitance value are more effective at a higher frequency and are more susceptible to the parasitic inductance. Therefore, minimize the loop area of the high-frequency current by placing the capacitors closer to the MCU.