SLUAAH0 February   2022 UCC14130-Q1 , UCC14131-Q1 , UCC14140-Q1 , UCC14141-Q1 , UCC14240-Q1 , UCC14241-Q1 , UCC14340-Q1 , UCC14341-Q1 , UCC15240-Q1 , UCC15241-Q1

 

  1.   Trademarks
  2. 1 Introduction
    1. 1.1 Pin Configuration and Functions
  3. 2 Three-Phase Traction Inverter
  4. 3 Gate Drive Bias Requirements
    1. 3.1 Gate Drive Bias Architectures
    2. 3.2 IGBT vs. SiC
    3. 3.3 Determining Required Bias Supply Power
    4. 3.4 Input Voltage Requirements
    5. 3.5 Output Voltage Requirements
  5. 4 Single Positive Isolated Output Voltage
  6. 5 Dual Positive and Negative Output Voltages
  7. 6 Dual Positive Output Voltages
  8. 7 Capacitor Selection
  9. 8 RLIM Current Limit Resistor
    1. 8.1 RLIM Functional Description
    2. 8.2 RLIM Dual Output Configuration
      1. 8.2.1 CVEE Above Nominal Value CVDD Below Nominal Value
      2. 8.2.2 CVEE Below Nominal Value CVDD Above Nominal Value
      3. 8.2.3 Gate Driver Quiescent Current: IQ_VEE > IQ_VDD
      4. 8.2.4 Gate Driver Quiescent Current: IQ_VEE < IQ_VDD
      5. 8.2.5 CVEE Above Nominal Value CVDD Below Nominal Value: IQ_VEE > IQ_VDD
      6. 8.2.6 CVEE Below Nominal Value CVDD Above Nominal Value: IQ_VEE < IQ_VDD
    3. 8.3 RLIM Single Output Configuration
  10. 9 UCC14240-Q1 Excel Design Calculator Tool
  11. 10Thermal Considerations
    1. 10.1 Thermal Resistance
    2. 10.2 Junction-to-Top Thermal Characterization Parameter
    3. 10.3 Thermal Measurement and TJ Calculation Example
  12. 11Enable (ENA) and Power Good (/PG)
  13. 12PCB Layout Considerations
  14. 13Reference Design Example
  15. 14Summary
  16. 15References

4 Single Positive Isolated Output Voltage

For SiC MOSFETs or IGBTs requiring only a single isolated output voltage, the UC14240-Q1 can be configured to regulate between 18 V<VDD-VEE<25 V. Connecting pin 33 to pin 34 allows a single feedback resistor divider, R2, R3 connected between VDD and VEE to set the regulation voltage as shown in Figure 4-1. The feedback pin serves as the inverting input to a hysteretic comparator. The non-inverting input is a precision, trimmed 2.5-V source, internally referenced to VEEA. For highest voltage set point accuracy, consider using 0.1% tolerance resistors, where the lower resistor, R3, shares the same reference point as the internal voltage reference at VEEA (U1-35). By selecting R3, then R2 can be calculated according to Equation 8.

Equation 8. R 2 = R 3 × V D D - V E E - 2.5   V 2.5   V

The circuit shown in Figure 4-1 is an example showing VDD = +20 V with respect to VEE. VEE can be referenced to any secondary-side, low-side ground or the switch-node, midpoint of a half-bridge configuration for high-side bias needs.


GUID-20220126-SS0I-8L4V-FL5Q-DTFJTCWQQ176-low.gif

Figure 4-1 Single Isolated Output