SLUAAH0 February   2022 UCC14130-Q1 , UCC14131-Q1 , UCC14140-Q1 , UCC14141-Q1 , UCC14240-Q1 , UCC14241-Q1 , UCC14340-Q1 , UCC14341-Q1 , UCC15240-Q1 , UCC15241-Q1

 

  1.   Trademarks
  2. Introduction
    1. 1.1 Pin Configuration and Functions
  3. Three-Phase Traction Inverter
  4. Gate Drive Bias Requirements
    1. 3.1 Gate Drive Bias Architectures
    2. 3.2 IGBT vs. SiC
    3. 3.3 Determining Required Bias Supply Power
    4. 3.4 Input Voltage Requirements
    5. 3.5 Output Voltage Requirements
  5. Single Positive Isolated Output Voltage
  6. Dual Positive and Negative Output Voltages
  7. Dual Positive Output Voltages
  8. Capacitor Selection
  9. RLIM Current Limit Resistor
    1. 8.1 RLIM Functional Description
    2. 8.2 RLIM Dual Output Configuration
      1. 8.2.1 CVEE Above Nominal Value CVDD Below Nominal Value
      2. 8.2.2 CVEE Below Nominal Value CVDD Above Nominal Value
      3. 8.2.3 Gate Driver Quiescent Current: IQ_VEE > IQ_VDD
      4. 8.2.4 Gate Driver Quiescent Current: IQ_VEE < IQ_VDD
      5. 8.2.5 CVEE Above Nominal Value CVDD Below Nominal Value: IQ_VEE > IQ_VDD
      6. 8.2.6 CVEE Below Nominal Value CVDD Above Nominal Value: IQ_VEE < IQ_VDD
    3. 8.3 RLIM Single Output Configuration
  10. UCC14240-Q1 Excel Design Calculator Tool
  11. 10Thermal Considerations
    1. 10.1 Thermal Resistance
    2. 10.2 Junction-to-Top Thermal Characterization Parameter
    3. 10.3 Thermal Measurement and TJ Calculation Example
  12. 11Enable (ENA) and Power Good (/PG)
  13. 12PCB Layout Considerations
  14. 13Reference Design Example
  15. 14Summary
  16. 15References

UCC14240-Q1 Excel Design Calculator Tool

The UCC14240-Q1 Excel Design Calculator Tool is available for download from the UCC14240-Q1 product folder on TI.com. The tool allows the user to input their known design parameters into the green boxes shown in Figure 9-1 and Figure 9-2. Based on user feedback and continuous improvement, the tool may be revised as needed, so users are encouraged to check the UCC14240-Q1 product folder for the latest version. The equations presented in this application report are used within the design calculator tool to simplify the task of quickly setting up the UCC14240-Q1.

The requested parameters are intuitive and each of the charge mismatch cases introduced in Section 8.2 are calculated to help select the proper RLIM value covering all cases. The quiescent current, IQ values will need to be obtained from the gate driver data sheet. Considering the worst-case mismatch, the UCC21736-Q1 10-A Source and Sink Reinforced Isolated Single Channel Gate Driver for SiC/IGBT with Active Protection and High-CMTI data sheet gives a maximum value of IQ_VDD=4.7 mA (OUT(L)) and a minimum value of IQ_VEE=830 µA (OUT(H)). Sometimes IQ_VEE may not be specified in the gate driver data sheet. In such cases, only the difference between IQ_VDD and IQ_VEE is used to calculate RLIM and IQ_VEE=0 A can be used as a worst-case.


GUID-20220126-SS0I-FNXW-9T7B-CRF7FCPHKMBM-low.png

Figure 9-1 UCC14240-Q1 Design Tool: Design Inputs (Green)

As highlighted in Figure 9-2, there are two selectable tabs available at the bottom of the design tool, allowing the user to configure the UCC14240-Q1 for either dual or single output, as shown in Figure 5-1 and Figure 4-1.


GUID-20220126-SS0I-ZHVN-TS2R-N8FMWGCP8VN4-low.png

Figure 9-2 UCC14240-Q1 Design Tool: Dual vs. Single Output