Figure 5-1 shows the clocking system for the EVM. In addition, optional clocking modifications are listed below and highlighted in red in the block diagram. A schematic snippet is also included for clarity.

• Differential Clock input to ADC (Bypass on board balun).
  • By default the EVM is configured to accept a single ended clock for convenience but the board can be modified so an external differential signal can be provided. This modification can be done by making the following modification.
  • Remove C20, C19, C22
  • Install C17, C18, C23 as 0.1uF 0201 capacitors.
• LMK04828 source clock shared from device clock input.
  • By default the board is configured so the device clock and LMK04828 reference clock come from two separate sources. There is an option to split the device clock input so it can be used as the reference clock to the LMK04828 as well. Note, this requires a higher power clock signal input to the EVM to account for the extra loss introduced by the splitting of the signal. This modification can be done by making the following modification.
  • Remove R15, R16 and R33.
  • Install R15, R16, R18 as 16 0201 resistors.
  • Install C55 as 0.1uF capacitor.

Figure 5-1 shows the clocking sub system for the EVM board. The red lines indicate the various optional clocking modifications.