SLVUDB9 July   2025 ADC34RF72

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Hardware and Software Setup
    1. 2.1  Board Overview
    2. 2.2  Required Equipment
    3. 2.3  Required Software Installation
    4. 2.4  Required TI Software to Install
    5. 2.5  3rd Party Software to Install
    6. 2.6  Software Environment Setup
    7. 2.7  Hardware Setup and Connections
    8. 2.8  ADC3xRF72 EVM Connections
    9. 2.9  TSW14J58 Data Capture Card Connections
    10. 2.10 Debug LEDs
    11. 2.11 EVM Jumpers and Switches
  9. 3ADC3xRF72 EVM Configuration and Programming
    1. 3.1  ADC EVM Quick Start
    2. 3.2  Power on all Boards and Signal Generators
    3. 3.3  Launch GSPS FPGA Server
    4. 3.4  Launch High-Speed Data Converter Professional (HSDC Pro) SW
    5. 3.5  Programming the ADC
    6. 3.6  Quick Start Mode
    7. 3.7  System Level Configuration Mode
    8. 3.8  Advanced Mode
    9. 3.9  Runtime Configuration
    10. 3.10 Exporting ADC3xRF72 Configuration and Python API usage
    11. 3.11 Further GUI Help
  10. 4Troubleshooting and FAQ
  11. 5Important Signal Routing
    1. 5.1 ADC Device Clock Routing
    2. 5.2 Board Modifications
      1. 5.2.1 ADC3xRF72 Analog Inputs
  12. 6Hardware Design Files
    1. 6.1 Schematics
    2. 6.2 PCB Layouts
    3. 6.3 Bill of Materials (BOM)
  13. 7Additional Information
    1. 7.1 Trademarks
  14. 8References

System Level Configuration Mode

To allow for rapid evaluation of the ADC, the GUI supports a “System Level Configuration” mode where the user can input close to their exact system level parameters and the ADC finds the optimal mode for meeting those goals. By default, the GUI shows this mode as well as the Quick Start mode described above. The following entry’s is shown “Sample Rate”, “IBW” or instantaneous bandwidth, “Center Frequency” and “Number of Bands.” Each option is described in detail below.

  • Sample Rate
    • This set the operating frequency of the ADC, this must be configured first as it sets the limit on all other selections.
  • Instantaneous Bandwidth (IBW)
    • The amount of useable information bandwidth. This is determined by Nyquist's theorem (Fs/2) as well as any necessary decimation settings required. For instance, If IBW of 800 is entered the GUI updates the value to 750MHz as this is the maximum IBW that can be obtained by the part. If less IBW is required then the GUI determines the closest configuration to meet that IBW requirement for example with an Fs = 1.5GHz and a desired IBW of 225MHz the GUI finds a value of 300MHz as that is the closest value given the parts DSP options to meet that requirement.
  • Center Frequency
    • IBW == Fs/2
      • Center frequency is not available as a programmable option as the ADC’s internal Digital Down Converters are bypassed to preserve the full rate produced by the ADC.
      • IBW < Fs/2
        • This sets the default center frequency for the band of interest. For example, if the user signal is located at 600MHz then the center frequency of the ADC can be set to 600MHz
    • Number of Bands
      • IBW == Fs/2
        • Then number of bands is disabled and the ADC outputs four distinct bands corresponding to each ADC input
      • IBW < Fs/2
        • Number of bands == 1
          • This option outputs one complex band per ADC input (Single Band)
        • Number of bands == 2
          • This option outputs two complex bands per ADC input (Dual Band)
        • Number of bands == 4
          • This option outputs four complex bands for channels A and C of the ADC. Channels B and D are ignored in this mode of operation (Quad Band)
        • Number of bands == 8
          • This option outputs eight complex bands for just channel A (Octal Band) the other analog inputs are ignored in this mode of operation

After configuring the system level settings, the user can click the program ADC button and after the GUI is finished, begin to capture data and analyze in HSDC Pro.

ADC34RF72 ADC GUI System Mode Labeled
          Image Figure 3-8 ADC GUI System Mode Labeled Image