SLVUDB9 July   2025 ADC34RF72

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Hardware and Software Setup
    1. 2.1  Board Overview
    2. 2.2  Required Equipment
    3. 2.3  Required Software Installation
    4. 2.4  Required TI Software to Install
    5. 2.5  3rd Party Software to Install
    6. 2.6  Software Environment Setup
    7. 2.7  Hardware Setup and Connections
    8. 2.8  ADC3xRF72 EVM Connections
    9. 2.9  TSW14J58 Data Capture Card Connections
    10. 2.10 Debug LEDs
    11. 2.11 EVM Jumpers and Switches
  9. 3ADC3xRF72 EVM Configuration and Programming
    1. 3.1  ADC EVM Quick Start
    2. 3.2  Power on all Boards and Signal Generators
    3. 3.3  Launch GSPS FPGA Server
    4. 3.4  Launch High-Speed Data Converter Professional (HSDC Pro) SW
    5. 3.5  Programming the ADC
    6. 3.6  Quick Start Mode
    7. 3.7  System Level Configuration Mode
    8. 3.8  Advanced Mode
    9. 3.9  Runtime Configuration
    10. 3.10 Exporting ADC3xRF72 Configuration and Python API usage
    11. 3.11 Further GUI Help
  10. 4Troubleshooting and FAQ
  11. 5Important Signal Routing
    1. 5.1 ADC Device Clock Routing
    2. 5.2 Board Modifications
      1. 5.2.1 ADC3xRF72 Analog Inputs
  12. 6Hardware Design Files
    1. 6.1 Schematics
    2. 6.2 PCB Layouts
    3. 6.3 Bill of Materials (BOM)
  13. 7Additional Information
    1. 7.1 Trademarks
  14. 8References

5.2.1 ADC3xRF72 Analog Inputs

The ADC3xRF72 has four analog inputs and the EVM routes all four as length matched signals. The default comes configured as single ended inputs that are AC couple and then SE-DIFF converted using the on board balun. There is also space on the EVM for a matching network to experiment with different matching networks depending on the application requirements.

The EVM can also be configured to accept an external differential signal with the following modifications. For components to bypass on board baluns, see Figure 5-3 through Figure 5-6.

ADC34RF72 ADC3xRF72 EVM Input A Analog Input Schematic Snippet Figure 5-3 ADC3xRF72 EVM Input A Analog Input Schematic Snippet
ADC34RF72 ADC3xRF72 EVM Input B Analog Input Schematic Snippet Figure 5-4 ADC3xRF72 EVM Input B Analog Input Schematic Snippet
ADC34RF72 ADC3xRF72 EVM Input C Analog input Schematic Snippet Figure 5-5 ADC3xRF72 EVM Input C Analog input Schematic Snippet
ADC34RF72 ADC3xRF72 EVM Input D Analog Input Schematic Snippet Figure 5-6 ADC3xRF72 EVM Input D Analog Input Schematic Snippet