SNOU150D January   2018  – April 2025 LMG1020

 

  1.   1
  2. 1 Introduction
  3. 2 Description
    1. 2.1 Typical Applications
    2. 2.2 Features
  4. 3 General TI High Voltage Evaluation User Safety Guidelines
  5. 4 Safety and Precautions
  6. 5 Electrical Performance Specifications
  7. 6 EVM Operation Out-of-the-Box
  8. 7 EVM Schematic
  9. 8 EVM Kit Contents
  10. 9 Test Setup
    1. 9.1 Test Equipment
    2. 9.2 Recommended Test Setup
    3. 9.3 List of Test Points
    4. 9.4 List of Terminals
  11. 10Test Procedure
    1. 10.1 Nanosecond Pulse Measurements
    2. 10.2 Pulse Shortener
    3. 10.3 Shutdown Procedure
      1. 10.3.1 Components rating and DNPs
  12. 11Performance Data and Typical Characteristics
  13. 12EVM Assembly Drawing and PCB Layout
  14. 13List of Materials
  15. 14Trademarks
  16. 15Revision History

10.3.1 Components rating and DNPs

  • All input capacitors are 100 V rated
  • The EPC2019 FET is 200 V rated to withstand inductive voltage spikes
  • The digital input buffer is placed to generate clean input signals on the board and to shorten the input pulse. To bypass it, the DNP resistor R3 has to be placed and resistor R10 has to be removed.
  • Out-of-the-box the resistor load, R5 - R8, is not populated (DNP).