SPRACF4C June   2018  – January 2023 AWR1243 , AWR1443 , AWR1642 , AWR1843 , AWR1843AOP , AWR2243 , AWR6843 , AWR6843AOP , IWR1843 , IWR6443 , IWR6843 , IWR6843AOP

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Purpose of Calibrations
    2. 1.2 Purpose of Monitoring Mechanisms
  3. 2Hardware Infrastructure to Support Calibration and Monitoring
  4. 3List of Calibrations
    1. 3.1  APLL Calibration
    2. 3.2  Synthesizer VCO Calibration
    3. 3.3  LO Distribution Calibration
    4. 3.4  ADC DC Offset Calibration
    5. 3.5  HPF Cutoff Calibration
    6. 3.6  LPF Cutoff Calibration
    7. 3.7  Peak Detector Calibration
    8. 3.8  TX Power Calibration
    9. 3.9  RX Gain Calibration
    10. 3.10 IQ Mismatch Calibration
    11. 3.11 TX Phase Shifter Calibration
  5. 4Impact of Calibration on Gain and Phase
  6. 5Impact of Interference on the Calibrations and Emissions Caused Due to Calibrations
  7. 6Scheduling of Runtime Calibration and Monitoring
    1. 6.1 Selection of CALIB_MON_TIME_UNIT
    2. 6.2 Selection of CALIBRATION_PERIODICITY
    3. 6.3 Application-Controlled One Time Calibration
  8. 7Software Controllability of Calibration
    1. 7.1  Calibration and Monitoring Frequency Limits
    2. 7.2  Calibration and Monitoring TX Frequency and Power Limit
    3. 7.3  Calibration Status Reports
      1. 7.3.1 RF Initialization Calibration Completion
      2. 7.3.2 Runtime Calibration Status Report
      3. 7.3.3 Calibration/Monitoring Timing Failure Status Report
    4. 7.4  Programming CAL_MON_TIME_UNIT
    5. 7.5  Calibration Periodicity
    6. 7.6  RF Initialization Calibration
    7. 7.7  Runtime Calibration
    8. 7.8  Overriding the TX Power Calibration LUT
    9. 7.9  Overriding the RX Gain Calibration LUT
    10. 7.10 Retrieving and Restoring Calibration Data
  9. 8References
  10.   A Calibration and Monitoring Durations
    1.     A.1 Duration of Boot Time Calibrations
  11.   Revision History

ADC DC Offset Calibration

The ADC DC offset is only calibrated once, at boot time. This calibration is carried out without any signal at the RF LNA input. The LNA input is terminated to block reception of any RF signal during the calibration, and the DC power is measured using the DFE statistics collection. The measured DC offsets are programmed into the digital DC correction block for cancellation.