SPRAD24 august   2023 AM2631 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
    1. 1.1 Key System Specifications
  5. 2AM263x Overview
    1. 2.1 AM263x Control Card and Traction System Framework
  6. 3Guide to Running TIDM-02014 Traction Inverter
    1. 3.1 Software Set-up
      1. 3.1.1 Code Composer Studio Project
      2. 3.1.2 Software Structure
    2. 3.2 Create Real Time Debug Interface
      1. 3.2.1 Confirm CCS Features
      2. 3.2.2 Create Target Configuration File
      3. 3.2.3 Add Serial Command Monitor Software
      4. 3.2.4 Launch Real Time Debug
    3. 3.3 Running the Code
      1. 3.3.1 Project Setup
      2. 3.3.2 Running the Application
    4. 3.4 Get Samples From ADC and Read Samples Through CCS
      1. 3.4.1 Register and Enable Interrupt
      2. 3.4.2 Add Log Code to Read Samples in Graph at Fixed Rate
      3. 3.4.3 Read ADC Samples in Expression and Graph Windows
    5. 3.5 Generate Space Vector PWM and Drive Motor in Open Loop
      1. 3.5.1 Setup SVPWM Generator Inputs
      2. 3.5.2 Read SVPWM Duty Cycles in Graph Window
      3. 3.5.3 Power Up Inverter and Spin Motor in Open Loop
    6. 3.6 Close Current Loop With Mock Speed
      1. 3.6.1 Add Transformations and Read Id-Iq in Open Loop
      2. 3.6.2 Add Controllers to Close Current Loop
      3. 3.6.3 Read Id-Iq to Close Current Loop
    7. 3.7 Add Software Resolver to Digital Converter
      1. 3.7.1 Generate Excitation for Resolver Hardware
      2. 3.7.2 Add Resolver Software
      3. 3.7.3 Read Resolver Software Outputs
  7. 4Brief Guide to Code Migration
    1. 4.1 SDK Resources Overview
    2. 4.2 Code Migration From C28
    3. 4.3 Code Migration From AM24
  8. 5Summary
  9. 6References

3.7 Add Software Resolver to Digital Converter

The software resolver to digital converter is implemented by sending excitation signal via DAC and DMA, and read sin and cos feedback with ADC. An overview of the configuration is summarized in Figure 3-25. In this work, PWM X is EPWM0 and PWM Y is EPWM7. EPWM0 at 10 kHz is the one triggering phase A power switches and the source of synchronization. EPWM7 at 20 kHz is dedicated to trigger EDMA0 for resolver excitation via DAC. ADC Start Of Conversion (SOC) is triggered at EPWM0 count zero. End Of Conversion (EOC) of ADC4 is the source of ADC INT1 containing the FOC loop. This section is to present functions and readings of the software resolver.

GUID-20220311-SS0I-NHT5-7MSP-MGKXQFX2DRR0-low.svg Figure 3-25 Software Resolver Synchronization and Excitation