Compensation designer then launches with the model of the voltage loop plant, as shown in Figure 3-26. The PI compensator can be edited to get the desired gain and phase margin, keeping in mind the bandwidth of the voltage loop has an inverse relationship with the THD achieved. Typically in a PFC application, this bandwidth is kept at approximately 10 Hz.
Figure 3-26 Voltage Loop PI Compensation Tuning Using Compensation Designer
Once satisfied with the compensator design, click on Save COMP. This action saves the compensator values into the project.
Note: If the project was not selected from the solution adapter, changes to the compensator are not allowed. To design one's own, select the solution through the solution adapter.
Close the Compensation Designer, and return to the powerSUITE page. Save using Ctrl + S.