SBAU416C November   2022  – March 2025 ADS9813 , ADS9817

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  6. 2Hardware
    1. 2.1 Additional Images
    2. 2.2 ADS9813EVM and ADS9817EVM Quick Start Guide
    3. 2.3 Analog Interface
      1. 2.3.1 ADC Input SMA Connections
      2. 2.3.2 Voltage Reference
    4. 2.4 Digital Interface and Clock Inputs
      1. 2.4.1 Digital Interface Connections
      2. 2.4.2 Clock Select
    5. 2.5 Power Supplies
      1. 2.5.1 USB Power and When to Power the Board Externally
  7. 3Software
    1. 3.1 ADS9817EVM and ADS9813EVM Software Installation
      1. 3.1.1 USB Driver Installation
    2. 3.2 ADS9817EVM Software (ADS9817EVM-GUI)
      1. 3.2.1 Using the CONFIG Tab
      2. 3.2.2 Using the Capture Tab
      3. 3.2.3 Using the INL/DNL Tool
      4. 3.2.4 Using the Histogram Tab
    3. 3.3 ADS9813EVM Software (ADS98XXEVM-GUI)
      1. 3.3.1 Using Configuration Tab
      2. 3.3.2 Using the Data Capture Tab
      3. 3.3.3 Using the Linearity Analysis Tab
      4. 3.3.4 Using the Histogram Analysis Tab
  8. 4Hardware Design Files
    1. 4.1 Schematics
      1. 4.1.1 ADS9813EVM Schematics
      2. 4.1.2 ADS9817EVM Schematics
    2. 4.2 Layout
    3. 4.3 Bill of Materials (BOM)
      1. 4.3.1 ADS9813EVM Bill of Materials (BOM)
      2. 4.3.2 ADS9817EVM Bill of Materials (BOM)
  9. 5Additional Information
    1. 5.1 Trademarks
  10. 6Related Documentation
  11. 7Revision History

Using the Data Capture Tab

Figure 3-11 and Figure 3-12 show example data capture time-domain display and FFT display, respectively. In this step, the necessary updates to the Data Capture settings are made to capture the time domain data and to get a good frequency domain result. First, the ENABLE SYNC button is clicked to generate a synchronization (SYNC) signal. The SYNC signal is only required once during power-up, or if the SMPL_CLK frequency is changed. The SYNC signal resets the internal analog channel selection logic and aligns the FCLKOUT signal to the data frame. Next, update the number of samples to at least 32k to get good frequency domain results (for example, accurate FFT display, SNR data, and THD data). The Input Frequency needs to be set to the frequency of the applied input signal.

When these changes are made, press the Start Capture button to collect time domain and frequency domain data. The Data Plot tab shows the time domain data and the FFT Plot tab shows the frequency domain data. The FFT plot window also shows the SNR, THD and SINAD performance measurements. Different channel data can be shown or hidden using the Channels tab above the plot.

ADS9813EVM, ADS9817EVM Time Domain DataFigure 3-11 Time Domain Data
ADS9813EVM, ADS9817EVM FFT DataFigure 3-12 FFT Data