SBAU478 February   2025

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specifications
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 Power Supplies
    2. 2.2 EVM Analog Input
    3. 2.3 ADC Circuit
    4. 2.4 Jumper Information
  9. 3Hardware Design Files
    1. 3.1 Schematics
    2. 3.2 PCB Layer Plots
    3. 3.3 Bill of Materials (BOM)
  10. 4Additional Information
    1. 4.1 Trademarks
  11. 5Related Documentation

2.1 Power Supplies

Figure 2-1 shows the circuit for the TPS73801-SEP low-dropout (LDO) voltage regulator. The PHI controller supplies 5.5V to the TPS73801-SEP LDO. The TPS73801-SEP regulates the 5.5V from the PHI to 5V, and supplies a clean 5V signal. The ADC168M102R-SEP uses the 5V signal to power the AVDD supply. Remove resistor R32 to disable the output of the TPS73801-SEP. Remove resistor R34 to disconnect the output of the TPS73801-SEP, and provide an external AVDD source to TP2.

ADC168M102REVM-PDK TPS73801-SEP Circuit Figure 2-1 TPS73801-SEP Circuit

DVDD is supplied directly by the PHI controller board through USB. Remove resistor R19 to disconnect DVDD sourced from the PHI, and provide an external DVDD source to TP3.

An external bipolar power supply is necessary to meet the common-mode voltage requirement and output swing from rail limit of the OPA4H014-SEP amplifier. The OPA4H014-SEP has a good power supply noise rejection ratio of ±0.1μV/V, so an additional voltage regulator is not required.

OPA_V+ must be between 6V and 10V to allow input signals to reach the positive full-scale range of the ADC168M102R-SEP. OPA_V- must be between -10V and -0.35V to allow input signals to reach values near 0V.