SBAU489 June 2025 AMC23C15 , AMC3302
Figure 2-3 shows the digital interface circuit for the AMC-MOD-50A-EVM.
The AMC1306M05 digital output and external clock input are accessible to the user through test points DOUT and CLKIN, respectively. DOUT is referenced to DGND and CLKIN is referenced to DGND. The passive components of the digital interface include R4, R6, C6, and C10 to form two RC filters for the data and clock lines. Each RC filter has a cutoff frequency of 53MHz. C3 and C4 serve as decoupling capacitors for noise reduction and low-side power supply (DVDD) stability.
The fixed output LDO, TPS73633DBVR, circuitry includes C11, C12. C13, and C14. These components serve as decoupling capacitors for noise reduction and high-side power supply (DVDD) stability.
Connectors J1 and J3 enable C2000 microcontroller connection for further digital output analysis.