SBOSAN2A August   2025  – December 2025 PGA854

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Gain Control
      2. 7.3.2 Input Protection
      3. 7.3.3 Output Common-Mode Pin
      4. 7.3.4 Using the Fully Differential Output Amplifier to Shape Noise
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Linear Operating Input Range
      2. 8.1.2 Current Consumption with Differential Inputs
    2. 8.2 Typical Application
      1. 8.2.1 ADS127L11 and ADS127L21B, 24-Bit, Delta-Sigma ADC Driver Circuit
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 PSpice® for TI
        2. 9.1.1.2 TINA-TI™ Simulation Software (Free Download)
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

7.3.3 Output Common-Mode Pin

The output voltages of the PGA854 are balanced with respect to the voltage on the output common-mode pin, VOCM. The starting point for most designs is to assign an output common-mode voltage for the PGA854. For ac-coupled signal paths, this voltage is often the default mid-supply voltage, so as to retain the most available output swing around the voltage centered at VOCM. For dc-coupled signal paths, and low voltage output supply, set this voltage between a maximum of VLVDD – 1.5V and minimum of VLVSS + 1.5V. for higher voltage supplies, set VOCM between VLVDD – 2V and minimum of VLVSS + 2V. Note that For precision ADC applications, this voltage is typically the input common-mode voltage of the ADC.

The voltage at the VOCM pin is internally buffered to bias the fully differential output amplifier, eliminating the need for an external VOCM buffer. In the event that the VOCM pin is left floating, the output common-mode control voltage is biased at output mid-supply using an internal 500kΩ-500kΩ resistor divider network connected between the output-stage power-supply pins.