SBOSAN2A August   2025  – December 2025 PGA854

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Gain Control
      2. 7.3.2 Input Protection
      3. 7.3.3 Output Common-Mode Pin
      4. 7.3.4 Using the Fully Differential Output Amplifier to Shape Noise
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Linear Operating Input Range
      2. 8.1.2 Current Consumption with Differential Inputs
    2. 8.2 Typical Application
      1. 8.2.1 ADS127L11 and ADS127L21B, 24-Bit, Delta-Sigma ADC Driver Circuit
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 PSpice® for TI
        2. 9.1.1.2 TINA-TI™ Simulation Software (Free Download)
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
VS Supply voltage on VS+, VS– pins; VS = (VS+) – (VS–) 0 40 V
VSOUT Supply voltage on LVDD, LVSS pins; VSOUT = VLVDD – VLVSS 0 40 V
Voltage on power pins LVDD, LVSS (VS–) – 0.5 (VS+) + 0.5 V
Voltage on signal-input pins IN+, IN– (VS–) – 40 (VS+) + 40 V
Voltage on pins DGND, FDA_IN+, FDA_IN– (VS–) – 0.5 (VS+) + 0.5 V
Voltage on gain-select pins A2, A1, A0 VDGND – 0.5 (VS+) + 0.5 V
VO Voltage on output pins OUT+, OUT– VLVSS – 0.5 VLVDD + 0.5 V
VOCM Output common-mode control voltage VLVSS – 0.5 VLVDD + 0.5 V
IO Output pins OUT+, OUT– current –100 100 mA
ISC Output short-circuit current(2) Continuous
TA Operating temperature –50 150 °C
TJ Junction temperature 175 °C
Tstg Storage temperature –65 150 °C
(1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.
(2) Short-circuit to VSOUT / 2.