SBOSAN2A August   2025  – December 2025 PGA854

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Gain Control
      2. 7.3.2 Input Protection
      3. 7.3.3 Output Common-Mode Pin
      4. 7.3.4 Using the Fully Differential Output Amplifier to Shape Noise
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Linear Operating Input Range
      2. 8.1.2 Current Consumption with Differential Inputs
    2. 8.2 Typical Application
      1. 8.2.1 ADS127L11 and ADS127L21B, 24-Bit, Delta-Sigma ADC Driver Circuit
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 PSpice® for TI
        2. 9.1.1.2 TINA-TI™ Simulation Software (Free Download)
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

1 Features

  • Eight pin-programmable decade (scope) gains
    • G (V/V) = ½, 1, 2, 5, 10, 20, 50, and 100
  • Fully differential outputs
  • Output common-mode control
  • Low gain error drift: ±2ppm/°C (maximum)
  • Faster signal processing:
    • Wide bandwidth: 6.2MHz (G < 10), 2.4MHz (G = 50, 100)
    • High slew rate: 45V/µs at all gains
    • Settling time: 750ns to 0.01% (G < 20)
    • Input stage noise: 8.8nV/√Hz at G > 10V/V
    • Filter option to achieve better SNR
  • Input overvoltage protection to ±40V beyond supplies
  • Input-stage supply range:
    • Single supply: 9V to 36V
    • Dual supply: ±4.5V to ±18V
  • Independent output power-supply pins
  • Output-stage supply range:
    • Single supply: 4.5V to 36V
    • Dual supply: ±2.25V to ±18V
  • Specified temperature range: ­–40°C to +125°C
  • Small package: 3mm × 3mm VQFN