SDAA032 July   2025 TDA4VE-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Understanding PWM Operation on TDA4x
    1. 2.1 PWM Architecture Overview
    2. 2.2 Counter-Compare Register and Duty Cycle Control
    3. 2.3 Action Qualifier and Output Behavior
    4. 2.4 Synchronization and Update Timing
  6. 3Unintended PWM Duty Cycle from Immediate CMPA Update
  7. 4Unintended PWM Duty Cycle from Up-Down Count Mode
  8. 5Best Practice for Seamless PWM Updates for LED Dimming Control
    1. 5.1 Use Shadow Registers for Duty Cycle Updates
    2. 5.2 Select the Appropriate Counter Mode
    3. 5.3 Register Configurations for Up-count Mode Under Shadowing
  9. 6Summary
  10. 7References

2.1 PWM Architecture Overview

Each EPWM module in TDA4x consists of a Time-Base (TB) module, Counter-Compare (CC) module, Action Qualifier (AQ) module, and event triggering mechanisms. The time-base counter defines frequency and period of the PWM waveform, while the counter-compare module determines when PWM signal transitions occur within each period.

The EPWM module supports several counter modes based on Time-Base Counter (TBCNT) and Time-Base Prriod (TBPRD):

  • Up-count mode: TBCNT counts from zero to TBPRD, then resets.
  • Down-count mode: TBCNT counts down from TBPRD to zero.
  • Up-down-count mode: TBCNT counts up to TBPRD and then back down to zero, creating center-aligned waveforms.

Each mode affects the timing of the PWM and how count compare values map to output transitions.