SDAA032 July 2025 TDA4VE-Q1
The following registers configuration can be used to generate 20% of PWM duty cycle in up count mode.
EPWM_TBPRD = 62500
EPWM_TBCTL.CTRMODE = 0 → Up count mode
EPWM_TBCTL.CLKDIV = 1
EPWM_CMPA = 12500 (= 62500 x 20%)
EPWM_CMPCTL.SHDWAMODE = 0 → Shadow mode
EPWM_CMPCTL.LOADAMODE = 0 → Load on TBCNT = 0 when shadow mode is enabled.
EPWM_AQCTLA.CAU = 0x3 → Toggle EPWM output
EPWM_AQCTLA.ZRO = 0x2 → Force EPWM output HIGHThen, there can be no unintended PWM duty cycle regardless the instance of writing a value into CMPA. Figure 5-1 is PWM signal probed when changing PWM duty cycle from 20% to 80%.
Figure 5-1 Probe PWM Changes With Shadow Mode in Up Count Mode
Figure 5-2 Analyze PWM Duty Cycle Change with Shadow Mode in Up Count ModeThis can be analyzed as in the following.
This is just an example to show how to control PWM duty cycle especially for LED dimming without unintended brightness.