SDAA050 August   2025 BQ25180 , BQ25186 , BQ25188 , BQ25622E , BQ25638 , BQ25798 , BQ25890 , TPS2121

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Possible Architectures
    1. 2.1 Power Mux
      1. 2.1.1 Other Power Mux Considerations
      2. 2.1.2 Power Mux Over Voltage and Priority Settings
      3. 2.1.3 Power Mux Testing
    2. 2.2 Multicell Charger IC
    3. 2.3 Dual Chargers
    4. 2.4 eFuses (USB OTG)
  6. 3Summary
  7. 4References

3 Summary

Table 3-1 Architecture comparison
Topology Power Mux Power Mux Dual Chargers Multi-Cell E-Fuse
Charger BQ25638 BQ25622E BQ25638 + BQ25186 BQ25798 BQ25638
Input control TPS2121 TPS2116 None 4x CSD17581 TPS25948+ LM3710
Price $2.10 $1.25 $2.12 $2.53/$2.08 $2.29
Combined Footprint 9.8mm² 10. 86mm² 9.8mm² 136mm² /20.7mm² 13.16mm²
Additional Control None None Active None Active
The comparison table above represents a number of possible designs each with advantages and disadvantages. The prices use 1k quantity prices from TI.com where available. The first two designs presented are based around the power mux topology that is explored thoroughly in the first part of the application note.

The first design presented uses the BQ25638 and TPS2121 which makes sure the system designer can use the full range of the charging ICs capabilities including the maximum input voltage of 18V and maximum input current of 3.2A. The power mux design also requires very few additional passive components, depending on the features required this can be limited to only a few small resistors.

The second power mux design intends to showcase a more cost-conscious design, using a different charger IC, which has many of the same features including a charge current of 3.2A with the main differences being a larger package (QFN type), lower max input voltage, and higher resistance BATFET. In addition, a different power mux is selected for this design to reduce cost. This power mux however has lower specifications than the charger limiting input current and voltage to 2.5A and 5.5V. In addition some input protections can be required to protect the rest of the circuit from higher voltages.

The dual charger design provides a unique advantage in applications where the two input sources benefit from two different charger topologies. For example if one input is relatively low power, such as a small solar cell a low specification linear charger can be selected for that input, and a different switching charger can be selected for the other input. This allows the system designer to minimize cost by selecting a charger with the specifications required only for each input.

The fourth design uses one of TIs multicell chargers which when combined with four FETs provides dual source capabilities. Two footprints and prices are provided for this design, the first of each describes the cost and footprint when using the FETs described in the EVM for the charging chip. The second shows the cost and footprint when using the CSD13385F5 FETs from TIs FemptoFET line. The original FETs have much greater current and voltage ratings than is required in most single-cell charging applications. To create a more cost and footprint competitive system, TI recommends selecting new FETs based the application requirements.

The last design is applicable in USB OTG applications where the device is being used as a power source. In addition, the eFuses have the advantage of having very low on resistance when compared to the power mux designs. The main disadvantages are the footprint as this design uses three independent ICs and the requirement for increased host interaction to control which fuse is active.