SDAA050 August   2025 BQ25180 , BQ25186 , BQ25188 , BQ25622E , BQ25638 , BQ25798 , BQ25890 , TPS2121

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Possible Architectures
    1. 2.1 Power Mux
      1. 2.1.1 Other Power Mux Considerations
      2. 2.1.2 Power Mux Over Voltage and Priority Settings
      3. 2.1.3 Power Mux Testing
    2. 2.2 Multicell Charger IC
    3. 2.3 Dual Chargers
    4. 2.4 eFuses (USB OTG)
  6. 3Summary
  7. 4References

2.1.3 Power Mux Testing

This method was tested using the BQ25638 and TPS2121 evaluation modules. The modules were connected using the output screw terminal of the TPS2121 EVM and the VBUS input of the BQ25638 EVM. Using the ICHG register the BQ25638 was set to produce a charge current of 1.04 amps, to simulate a battery the charger was connected to a source meter set with a potential of 3.7V. In addition the system output was connected to an electronic load set to consume another 0.5A. The two TPS2121 inputs were connected to DC power supplies set to output 12V.

Test One, 0uF Added Capacitance, Nominal Load Figure 2-3 Test One, 0uF Added Capacitance, Nominal Load

In this first test, there is no added capacitance on the node between the power mux and charger IC. Input 1 (not shown) is set to 12V and is actively powering the BQ25638, the DC power supply on input 2 (IN_2), the priority input, is then switched on. At approximately 4ms on the waveform the TPS2121 switches over and there is a significant drop in the system voltage to 3V. In addition, there is significant spike in the input voltage to nearly 15V.

Test Two, 10uF Added Capacitance, Nominal Load Figure 2-4 Test Two, 10uF Added Capacitance, Nominal Load

The same test is preformed in this waveform with the addition of a 10uF capacitor on the node connecting the two devices. This eliminates the drop-in system voltage, and spike in input voltage.

Test Three, 0uF Added Capacitance, Nominal Load Figure 2-5 Test Three, 0uF Added Capacitance, Nominal Load

The same test is performed here (without added capacitance), and with the yellow waveform representing the connection node voltage (VBUS). The connection node voltage drops to nearly 2.5V

Test Four, 10uF Added Capacitance, Nominal Load Figure 2-6 Test Four, 10uF Added Capacitance, Nominal Load

The same test is performed here with the 10uF capacitor, and with the yellow wave form representing the connection node voltage (connection between the TPS2121 output and BQ25638 VBUS). The connection node drops in voltage to a much more reasonable 7.5V. This can be improved further with a larger capacitor and can be required when drawing increased current from the device.

Test Five, 0uF Added Capacitance, 3A Output Current Figure 2-7 Test Five, 0uF Added Capacitance, 3A Output Current
Test Six, 100uF Added Capacitance, 3A of Output Current Figure 2-8 Test Six, 100uF Added Capacitance, 3A of Output Current

These two tests were run under much greater load conditions, and required much higher capacitance values on the TPS2121 output node. In this waveform, there is a drop in system voltage, as well as the significant oscillations in the input waveform.

The voltage drop across the TPS2121 was also tested while drawing two amps at 12V from the TPS2121 with the electronic load. The voltage drop is approximately 0.11V closely following the 56mΩ listed on resistance