SDAA050 August   2025 BQ25180 , BQ25186 , BQ25188 , BQ25622E , BQ25638 , BQ25798 , BQ25890 , TPS2121

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Possible Architectures
    1. 2.1 Power Mux
      1. 2.1.1 Other Power Mux Considerations
      2. 2.1.2 Power Mux Over Voltage and Priority Settings
      3. 2.1.3 Power Mux Testing
    2. 2.2 Multicell Charger IC
    3. 2.3 Dual Chargers
    4. 2.4 eFuses (USB OTG)
  6. 3Summary
  7. 4References

Dual Chargers

For this example, the BQ25638 is used along with a BQ25186 linear 1A battery charger IC. In this application each of the two sources are connected to the respective charger ICs, the battery (BAT) pins of each IC are again shorted to each other and connected to the battery and the system output of the switching charger is connected to the system load.

 Parallel Chargers Block
                    Diagram Figure 2-10 Parallel Chargers Block Diagram

While a system designer can connect the system outputs of both devices to the system load, this comes with relatively complex control implications, and we recommend the configuration shown in Figure 2-10. This configuration still allows for the linear charger current to contribute to the system load though the BATFETs of both devices. This comes with the obvious disadvantage the increased resistance by going through both BATFETs. If the system designer still wants to connect both chargers with BAT and SYS outputs in parallel, the system designer must make sure that the BATFET of the non charging device is not active. This can be accomplished a few ways but if not done properly can result in damaging one or both of the charging ICs

While less critical then the above considerations regarding the system output, TI recommends that the host processor control the chargers so that even if the system and the host both have valid inputs only one is actively charging. The chargers being active simultaneously does not cause any damage to the system. However each of the charge currents adds to each other and the system designer must make sure that if this functionality is desired that the combined charge currents do not exceed the rated charge current of the battery.

Make sure that the proper output capacitors are placed close to there respective ICs, especially for the switching charger, as the 20uF capacitance shown in the application diagram plays a key role in the buck converter circuit. In addition the I2C lines can also be tied together as the devices have different I2C addresses (0x6A for the linear charger, and 0x6B for the switching charger). In addition the interrupt pins can also be wired together as the interrupt pins are both open drain outputs.