SDAA161 December   2025 TMS320F280025C , TMS320F280037C , TMS320F280039C , TMS320F280041C , TMS320F280049C , TMS320F28379D , TMS320F28379S , TMS320F28P550SG , TMS320F28P550SJ , TMS320F28P650DH , TMS320F28P650DK , TMS320F28P650SH , TMS320F28P650SK

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Design Overview
  6. 3CLB Implementation
    1. 3.1 CLB Input Selection
    2. 3.2 Counter and FSM Configuration
    3. 3.3 CLB Output
  7. 4EPWM Configurations
    1. 4.1 Test Results
  8. 5Summary
  9. 6References

4 EPWM Configurations

Table 4-1 lists the different EPWM settings for positive and negative cycles. Different from traditional EPWM configurations, which use dead-band submodule to generate two complementary PWM outputs of the same EPWM module, the complementary behaviors are verified by the inverted action-qualifier actions of two EPWM modules in the present design. Since two EPWM modules shared the same CMPA value, the link register EPWMXLINK can be used to make sure the CMPA value is always updated simultaneously for two EPWM modules.

Grid-tied inverter must take care of the control during both positive and negative cycles. With the present EPWM configurations, swapping EPWMxA and EPWMxB output with the DBCTL[OUT_MODE] register in the dead-band submodule during the zero crossing point is simple.

Table 4-1 EPWM Settings for Positive and Negative Cycles
EPWM Signals Basic Setting for Position Cycle Negative Cycle
S1-EPWM5A ↑ CAU
↓ CAD
With rising edge delay enabled		 Swap EPWMxA and EPWMxB output
S2-EPWM1B Forced high
S3-EPWM1A ↑ CAD
↓ CAU
With rising edge delay enabled
S4-EPWM5B Forced low

The below codes show the example to swap EPWM outputs.


        if(positive_cycle==1)
        {
//Default setting is for positive cycle
             EPWM_setDeadBandOutputSwapMode(EPWM1_BASE, EPWM_DB_OUTPUT_A,false); 
             EPWM_setDeadBandOutputSwapMode(EPWM1_BASE, EPWM_DB_OUTPUT_B,false); 
             EPWM_setDeadBandOutputSwapMode(EPWM5_BASE, EPWM_DB_OUTPUT_A,false); 
             EPWM_setDeadBandOutputSwapMode(EPWM5_BASE, EPWM_DB_OUTPUT_B,false); 
        }
        else
        {
// for negative cycle
EPWM_setDeadBandOutputSwapMode(EPWM1_BASE, EPWM_DB_OUTPUT_A, true);            EPWM_setDeadBandOutputSwapMode(EPWM1_BASE, EPWM_DB_OUTPUT_B, true); 
EPWM_setDeadBandOutputSwapMode(EPWM5_BASE, EPWM_DB_OUTPUT_A, true);            EPWM_setDeadBandOutputSwapMode(EPWM5_BASE, EPWM_DB_OUTPUT_B, true); 
        }