SDAA212 November   2025 AM620-Q1 , AM623 , AM625 , AM625-Q1 , AM62A1-Q1 , AM62A3 , AM62A3-Q1 , AM62A7 , AM62A7-Q1 , AM62D-Q1

 

  1.   1
  2.   Abstract
  3.   How to Use this Document
  4.   Trademarks
  5. 1Digital Audio Formats
    1. 1.1 I2S
    2. 1.2 TDM
  6. 2McASP Overview
  7. 3McASP Connections for AM62x Devices
    1. 3.1 McASP Common Configurations
      1. 3.1.1 McASP as a Clock Controller
        1. 3.1.1.1 Clocks Generated using the AUDIO_EXT_REFCLK AHCLK Source
      2. 3.1.2 McASP as Clock Peripheral
  8. 4McASP Layout Considerations
    1. 4.1 McASP Signals Shared with Bootmode Logic
    2. 4.2 McASP Topology for Multiple Devices in Single Clock Domain
  9. 5McASP Practical Examples
    1. 5.1 Audio Playback using AUDIO_EXT_REFCLK for Two Clock Domains
    2. 5.2 Audio Playback with External Clock Source and McASP SYNC mode
  10. 6Key Audio System Design Takeaways
  11. 7References

3.1.1 McASP as a Clock Controller

If the McASP is configured as a clock controller, then the bit clock and frame sync signals are configured as outputs. The SDK driver defines bit clock and frame sync as outputs when the source is set to Internally Generated. This means that the bit clock is internally generated from the high clock and that the frame sync is generated based on the bit clock. The high clock of a TX or RX domain feature many options to best fit audio system requirements.

The AUXCLK is a single clock reference that can be sourced to both the TX and RX domains. The AM62x devices have the McASP AUXCLK input tied to the internal PLL outputs for 100 MHz and 96 MHz.

Note: Because the AM62x AUXCLK input does not feature an audio frequency input, the AUXCLK (and internally generated AHCLK) should not be used on AM62x devices.

When the AHCLK is internally generated, then the AHCLK can be routed as an output on any of the AUDIO_EXT_REFCLK pins for a high-frequency reference.

Note: The AHCLK must be configured to reference AUXCLK to internally generate the AHCLK in order to use AHCLK as an output on AUDIO_EXT_REFCLK. Therefore, AHCLK as an output on AUDIO_EXT_REFCLK is not an option on AM62x devices for most applications.
McASP Controller with AUXCLK Source Figure 3-3 McASP Controller with AUXCLK Source