SDAA212 November   2025 AM620-Q1 , AM623 , AM625 , AM625-Q1 , AM62A1-Q1 , AM62A3 , AM62A3-Q1 , AM62A7 , AM62A7-Q1 , AM62D-Q1

 

  1.   1
  2.   Abstract
  3.   How to Use this Document
  4.   Trademarks
  5. 1Digital Audio Formats
    1. 1.1 I2S
    2. 1.2 TDM
  6. 2McASP Overview
  7. 3McASP Connections for AM62x Devices
    1. 3.1 McASP Common Configurations
      1. 3.1.1 McASP as a Clock Controller
        1. 3.1.1.1 Clocks Generated using the AUDIO_EXT_REFCLK AHCLK Source
      2. 3.1.2 McASP as Clock Peripheral
  8. 4McASP Layout Considerations
    1. 4.1 McASP Signals Shared with Bootmode Logic
    2. 4.2 McASP Topology for Multiple Devices in Single Clock Domain
  9. 5McASP Practical Examples
    1. 5.1 Audio Playback using AUDIO_EXT_REFCLK for Two Clock Domains
    2. 5.2 Audio Playback with External Clock Source and McASP SYNC mode
  10. 6Key Audio System Design Takeaways
  11. 7References

4 McASP Layout Considerations

The McASP is designed to be able to interface with multiple audio devices simultaneously using a single clock domain. However, the signal integrity of the clock and data signals may be impacted depending on the layout implementation. This chapter highlights the two most important layout considerations for the McASP on the AM62x devices.

Note: Regardless of layout implementation parameters, the McASP signal layout should always be simulated to ensure the clock and data signals meet the datasheet timing requirements.