SLAAE88D December   2022  – September 2025 MSPM0C1105 , MSPM0C1106 , MSPM0G1105 , MSPM0G1106 , MSPM0G1107 , MSPM0G1505 , MSPM0G1506 , MSPM0G1507 , MSPM0G3105 , MSPM0G3106 , MSPM0G3107 , MSPM0G3505 , MSPM0G3506 , MSPM0G3507 , MSPM0H3216 , MSPM0L1105 , MSPM0L1106 , MSPM0L1227 , MSPM0L1227-Q1 , MSPM0L1228 , MSPM0L1228-Q1 , MSPM0L1303 , MSPM0L1304 , MSPM0L1304-Q1 , MSPM0L1305 , MSPM0L1305-Q1 , MSPM0L1306 , MSPM0L1306-Q1 , MSPM0L1343 , MSPM0L1344 , MSPM0L1345 , MSPM0L1346 , MSPM0L2227 , MSPM0L2227-Q1 , MSPM0L2228 , MSPM0L2228-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 Introduction
    1. 1.1 Bootloader Concept
    2. 1.2 MSPM0 Bootloader Structure
      1. 1.2.1 ROM-Based BSL
      2. 1.2.2 ROM-Based BSL With Flash-Based Plug-In Interface
      3. 1.2.3 Flash-Based Secondary BSL
    3. 1.3 MSPM0 BSL Features and Demos Summary
  5. 2BSL Host Implementation Summary
  6. 3BSL Configuration in Non-Main (Configuration NVM)
    1. 3.1 Non-Main Introduction
    2. 3.2 Example – Disable PA18 BSL Invoke Pin With Sysconfig
  7. 4Bootloader Host
    1. 4.1 MCU Host Code Introduction
      1. 4.1.1 Hardware Connection
      2. 4.1.2 TXT to Header File Conversion
      3. 4.1.3 Step-by-Step Using the Demo
    2. 4.2 PC Host Example
      1. 4.2.1 Prepare the Image File and Password File
      2. 4.2.2 Steps to Using the GUI
  8. 5Bootloader Target
    1. 5.1 Default ROM-Based BSL
      1. 5.1.1 UART Interface
      2. 5.1.2 I2C Interface
    2. 5.2 Flash-Based Plug-In Interface Demos
      1. 5.2.1 UART Interface
        1. 5.2.1.1 Step by Step Using the Demo
        2. 5.2.1.2 How to Debug the Plug-In Interface Code
      2. 5.2.2 I2C Interface
      3. 5.2.3 SPI Interface
      4. 5.2.4 CAN Interface
    3. 5.3 Secondary BSL Demo
      1. 5.3.1 Flash-Based Secondary BSL Start From 0x1000
      2. 5.3.2 Flash-Based Secondary BSL Start From 0x0000
        1. 5.3.2.1 Flash-Based 0x0 Address BSL Demo for MSPM0C
        2. 5.3.2.2 Live Firmware Update
  9. 6Common Questions
    1. 6.1 Linker File Modification
    2. 6.2 Factory Reset by CCS to Recover Device
  10. 7References
  11. 8Revision History

3.1 Non-Main Introduction

There are three different kind of Flash memories in MSPM0 devices.

Table 3-1 Flash Memory Regions
Flash Memory Region Region Contents Executable Used by Programmed by
FACTORY Device ID and other parameters No Application TI only(not modifiable)
NON-MAIN Device boot configuration (BCR and BSL) No Boot ROM TI, User
MAIN Application code and data Yes Application User

The NON-MAIN is a dedicated region of Flash memory that stores the configuration data used by the BCR and BSL to boot the device. The region is not used for any other purpose. The BCR and BSL both have configuration policies that can be left at their default values (as is typical during development and evaluation), or modified for specific purposes (as is typical during production programming) by altering the values programmed into the NON-MAIN flash region. Due to MSPM0C series do not have ROM based BSL, so there is no BSL related configuration part in MSPM0C series device's NON-MAIN.

Table 3-2 NON-MAIN Region Overview
NON-MAIN Section Start Address End Address
BCR Configuration 41C0.0000h 41C0.005Bh
BCR Configuration CRC 41C0.005Ch 41C0.005Fh
BSL Configuration 41C0.0100h 41C0.0153h
BSL Configuration CRC 41C0.0154h 41C0.0157h

The main BSL parameters can be configured in Table 3-3. For different families have different contents in the non-main flash, more details please refer to TRM.

Table 3-3 NON-MAIN Flash BSL Configuration Main Parameters
Parameters Using Case Parameters Description
Common BSLCONFIGID BSL configuration ID
BSLPW 256-bit BSL access password. (Optional for secondary BSL)
BSLCONFIG0 BSL invoke pin configuration and memory read-out policy. (For memory read-out policy is optional for secondary BSL)
BSLAPPVER Address of the application version word.
BSLCONFIG1 BSL security configuration.(Optional for secondary BSL)
BSLCRC CRC digest (CRC-32) of the BSL_CONFIG portion of the NON-MAIN memory.
ROM-Based BSL BSLPINCFG0 BSL UART pin configuration
BSLPINCFG1 BSL I2C pin configuration
ROM-Based BSL with Flash based Plug-in interface BSLPLUGINCFG Defines the presence and type of a BSL plug-in in MAIN Flash memory.
BSLPLUGINHOOK Function pointers for plug-in init, receive, transmit, and de-init functions
Flash-Based Secondary BSL PATCHHOOKID Alternate BSL configuration
SBLADDRESS Address of an alternate BSL.

For more details about the NON-MAIN flash, see the MSPM0 L-Series 32-MHz Microcontrollers Technical Reference Manual or MSPM0 G-Series 80-MHz Microcontrollers Technical Reference Manual.