SLAAEN5 February 2025 MSPM0G1106 , MSPM0G1107 , MSPM0G1506 , MSPM0G1507 , MSPM0G1518 , MSPM0G1519 , MSPM0G3106 , MSPM0G3106-Q1 , MSPM0G3107 , MSPM0G3107-Q1 , MSPM0G3506 , MSPM0G3506-Q1 , MSPM0G3507 , MSPM0G3507-Q1 , MSPM0G3518 , MSPM0G3518-Q1 , MSPM0G3519 , MSPM0G3519-Q1
In general, SPI master controls the SPI communication, and SPI slave cannot trigger slave-to-master communication. In this design, another IO is used. The IO pull-down of the slave notifies the master that there is information to be sent. The user can modify the pin or remove the IO function as required.
For SPI receive, there are two global variables defined in bridge_spi.c.
uint8_t gSpiReceiveGroup[SPI_RX_SIZE];
Custom_Element gSPI_RX_Element;
The following is the process for SPI master reception An IO interrupt is used to detect the IO pull-down.
The following is the process for SPI slave reception.
For SPI transmission, there are two global variables defined in bridge_spi.c.
uint8_t gSpiTransmitGroup[SPI_TX_SIZE];
Custom_Element gSPI_TX_Element;
The following is the process for SPI master and slave transmission