SLCA006 June 2025 LM339 , LM393 , LMH7322 , TL331 , TLV1812 , TLV1871 , TLV1872 , TLV3601 , TLV3604
The Low Voltage Differential Signaling (LVDS) output stage uses a switched ±4mA current between the outputs and eliminates the negative supplies and the two pull-down resistors as required for ECL based outputs. LVDS further reduces the output swing to ±400mV centered on +1.2V.
Figure 2-12 LVDS OutputThe LVDS termination is easy to implement with just a single 100Ω termination resistor between the outputs at the receiver. The 100Ω resistor combined with the ±4mA differential current creates the ±400mV differential signal at the receiver.
Figure 2-13 LVDS TerminationLVDS, also known as TIA/EIA-644, is also the basis of many popular interlink protocols, such as Display Port, FPD-Link, Channel Link, Firewire, and Serial ATA. Many processors and ASIC's have native LVDS inputs with internal termination resistors.
Examples of devices that support the LVDS standard are the LMH7220, TLV3604/5/7, TLV3801/2 and TLV3811/11C.
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