SLLSFN5B June   2023  – September 2025 ISO1228

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Power Ratings
    6. 5.6  Insulation Specifications
    7. 5.7  Safety-Related Certifications
    8. 5.8  Safety Limiting Values
    9. 5.9  Electrical Characteristics—DC Specification
    10. 5.10 Switching Characteristics—AC Specification
    11. 5.11 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1 Test Circuits
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Surge Protection
      2. 7.3.2  Field Side LED Indication
      3. 7.3.3  Serial and Parallel Output option
      4. 7.3.4  Cyclic Redundancy Check (CRC)
      5. 7.3.5  FAULT Indication
      6. 7.3.6  Digital Low Pass Filter
      7. 7.3.7  SPI Register Map
      8. 7.3.8  SPI Timing - Non-Daisy Chain
      9. 7.3.9  SPI Timing - Daisy Chain
      10. 7.3.10 SPI Timing - Burst Mode
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Sinking Type Digital Inputs
      2. 8.2.2 Sourcing Type Digital Inputs
      3. 8.2.3 Sink/Source Type Digital Inputs
      4. 8.2.4 Design Requirements
        1. 8.2.4.1 Detailed Design Procedure
          1. 8.2.4.1.1 Current Limit
          2. 8.2.4.1.2 Voltage Thresholds
          3. 8.2.4.1.3 Wire-Break Detection
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

7.3.6 Digital Low Pass Filter

The ISO1228 supports in-built digital low pass filters on the INx and WBx data paths. The filters can be programmed through SPI registers (where each channel filter can be individually programmed) or through the pins F0 and F1. F0 and F1 pins support three input states, high, low, and float, resulting in 9 values of digital filtering. Refer to the Switching Characteristics section for values of the digital filters. The filter values in the SPI registers take precedence. If any SPI filter Enable has a non-zero value, then the states of F0 and F1 pins are ignored.

ISO1228 also supports a digital filter on the Wire Break detection fault. This is a fixed, non-programmable, 30ms filter.