SLLSFO4D December   2022  – August 2025 ISOM8710 , ISOM8711

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  Electrical Characteristics—DC 
    10. 6.10 Switching Characteristics, ISOM8710
    11. 6.11 Switching Characteristics, ISOM8711
    12. 6.12 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Sizing RIN
        2. 9.2.2.2 Driving the Input with a Buffer
        3. 9.2.2.3 Calculating RL for ISOM8711
      3. 9.2.3 Application Curves
      4. 9.2.4 Insulation Lifetime
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

6.11 Switching Characteristics, ISOM8711

Over recommended operating conditions unless otherwise noted. VCC = 2.7 V to 5.5 V.  RL = 300 Ω unless otherwise specified. All typical specifications are at TA = 25 ℃ and VCC = 3.3 V.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tr Output signal rise time Figure 7-3, RL = 300 Ω, CL = 15 pF 15 ns
tf Output signal fall time Figure 7-3, RL = 300 Ω, CL = 15 pF 15 ns
tPLH Propagation delay time for output LOW to HIGH transition Figure 7-3, IF = 6 mA to 0 mA, CL = 15 pF. Tr = Tf = 5 ns, RL = 300 Ω 54 ns
tPHL Propagation delay time for output HIGH to LOW transition Figure 7-3, IF = 0 mA to 6 mA, CL = 15 pF. Tr = Tf = 5 ns, RL = 300 Ω 54 ns
PWD Pulse Width Distortion |tPHL - tPLH| Figure 7-3, IF = 6 mA, CL = 15 pF. Tr = Tf = 5 ns 4.8 26 ns
tpsk Part-to-part delay skew IF = 6 mA, CL = 15 pF. Tr = Tf = 5 ns 15 ns
|CMTIL| Common mode transient immunity with a static LOW output Figure 7-6, VCM = 1200 Vp-p, IF = 6 mA, Output = LOW ±125 ±150 kV/µs
|CMTIH| Common mode transient immunity with a static HIGH output Figure 7-6, VCM = 1200 Vp-p, IF = 0 mA, Output = HIGH ±800 ±1000 kV/µs
TIE Time Interval Error 216 – 1 PRBS data at 20 Mbps, IF = 6 mA 3.7 12 ns