7.5.2 Procedure to Read the TUSB1044A I2C
Registers:
The controller initiates a read operation by generating a start condition (S), followed by the TUSB1044A 7-bit address and a one-value W/R bit to indicate a read cycle
The TUSB1044A acknowledges the address cycle.
The TUSB1044A transmit the contents of the memory registers MSB-first starting at register 00h or last read sub-address+1. If a write to the I2C register occurred prior to the read, then the TUSB1044A shall start at the sub-address specified in the write.
The TUSB1044A waits for either an acknowledge (ACK) or a not-acknowledge (NACK) from the controller after each byte transfer; the I2C controller acknowledges reception of each data byte transfer.
If an ACK is received, the TUSB1044A transmits the next byte of data.
The controller terminates the read operation by generating a stop condition (P).