Input offset voltage, VIO, is defined as "the DC voltage that must be applied between the input terminals to force the quiescent DC output voltage to zero or some other level, if specified". If the input stage was perfectly symmetrical and the transistors were perfectly matched, VIO = 0. Because of process variations, geometry and doping are never exact to the last detail. All op amps require a small voltage between their inverting and non-inverting inputs to balance the mismatches. VIO is normally depicted as a voltage source driving the non-inverting input, as shown in Figure 5-1.
TI data sheets show two other parameters related to VIO; the average temperature coefficient of the input offset voltage and the input offset voltage long-term drift.
The average temperature coefficient of input offset voltage, αVIO, specifies the expected input offset drift over temperature. Its units are uV/°C. VIO is measured at the temperature extremes of the part, and αVIO is computed as ΔVIO/Δ°C.
Normal aging in semiconductors causes changes in the characteristics of devices. The input offset voltage long-term drift specifies how VIO is expected to change with time. Its units are mV/month.
Input offset voltage is of concern anytime DC precision is required. Several methods are used to null its effects.