SLOS887G September   2014  – May 2025 TMP112-Q1 , TMP112D-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Specifications for User-Calibrated Systems (TMP112-Q1 Only)
    7. 6.7  Timing Requirements
    8. 6.8  Timing Diagrams
    9. 6.9  Typical Characteristics (TMP112-Q1)
    10. 6.10 Typical Application (TMP112D-Q1)
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Digital Temperature Output
      2. 7.3.2 Serial Interface
        1. 7.3.2.1 Bus Overview
        2. 7.3.2.2 Serial Bus Address
        3. 7.3.2.3 Writing and Reading Operation
        4. 7.3.2.4 Target Mode Operation
          1. 7.3.2.4.1 Target Receiver Mode
          2. 7.3.2.4.2 Target Transmitter Mode
        5. 7.3.2.5 SMBus Alert Function
        6. 7.3.2.6 General Call
        7. 7.3.2.7 High-Speed (Hs) Mode
        8. 7.3.2.8 Timeout Function
        9. 7.3.2.9 Timing Diagrams
          1. 7.3.2.9.1 Two-Wire Timing Diagrams
    4. 7.4 Device Functional Modes
      1. 7.4.1 Continuous-Conversion Mode
      2. 7.4.2 Extended Mode (EM)
      3. 7.4.3 Shutdown Mode (SD)
      4. 7.4.4 One-Shot and Conversion Ready Mode (OS)
      5. 7.4.5 Thermostat Mode (TM)
        1. 7.4.5.1 Comparator Mode (TM = 0)
        2. 7.4.5.2 Interrupt Mode (TM = 1)
    5. 7.5 Programming
      1. 7.5.1 Pointer Register
      2. 7.5.2 Temperature Register
      3. 7.5.3 Configuration Register
        1. 7.5.3.1 Shutdown Mode (SD)
        2. 7.5.3.2 Thermostat Mode (TM)
        3. 7.5.3.3 Polarity (POL)
        4. 7.5.3.4 Fault Queue (F1/F0)
        5. 7.5.3.5 Converter Resolution (R1 and R0)
        6. 7.5.3.6 One-Shot (OS)
        7. 7.5.3.7 Extended Mode (EM)
        8. 7.5.3.8 Alert (AL)
        9. 7.5.3.9 Conversion Rate (CR)
      4. 7.5.4 High- and Low-Limit Registers
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Calibrating for Improved Accuracy (TMP112-Q1 Only)
        1. 8.1.1.1 Example 1: Finding Worst-Case Accuracy From –15°C to 50°C
        2. 8.1.1.2 Example 2: Finding Worst-Case Accuracy From 25°C to 100°C
      2. 8.1.2 Using The Slope Specifications With a 1-Point Calibration (TMP112-Q1 Only)
        1. 8.1.2.1 Power Supply-Level Contribution to Accuracy
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

7.5.1 Pointer Register

Figure 7-8 shows the internal register structure of the TMP112-Q1/TMP112D-Q1 device. The 8-bit pointer register of the device is used to address a given data register. The pointer register uses the two LSBs (see Table 7-12) to identify which of the data registers must respond to a read or write command. The power-up reset value of the P[1:0] byte is 00. By default, the TMP112-Q1/TMP112D-Q1 device reads the temperature on power up.

TMP112-Q1 TMP112D-Q1 Internal Register StructureFigure 7-8 Internal Register Structure

Table 7-6 lists the pointer address of the registers available in the TMP112-Q1/TMP112D-Q1 device.Table 7-7 lists the bits of the pointer register byte. During a write command, bytes P2 through P7 must always be 0.

Table 7-6 Pointer Addresses
P1P0REGISTER
00Temperature register (read only [R])
01Configuration register (read-write [R/W])
10T(LOW) register (R/W)
11T(HIGH) register (R/W)
Table 7-7 Pointer Register Byte
P7P6P5P4P3P2P1P0
000000Register Bits