SLUSC82B April 2017 – July 2026 UCC24630
PRODUCTION DATA
To minimize power consumption at very light load and standby conditions, the UCC24630 disables the SR DRV output and enters a low current operating state. The criteria for operating in standby mode or normal operation are determined by the average frequency detected on the VPC pin. The frequency detection is compatible with burst mode operation or continuous low frequency FM operation. At start-up, the device is in normal operation to enable DRV to the SR MOSFET. If < 64 cycles occur in tENTO, 12.8ms typical, the device disables the DRV output and enters low-current operating mode with bias current of ISTBY. In standby mode the criteria to enter normal operating mode is when > 32 cycles occur within tEN, 2.56ms typical. The device enters normal operation as soon as the 32 cycles occur to reduce the response time exiting standby operation. The average frequency of entering standby mode is 5kHz typical, and the average frequency of exiting standby mode is 12.5kHz typical. Refer to Figure 6-10 for an illustration of standby mode timing.