SLUSG22 October   2025 UCC35131-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Insulation Specifications
    6. 6.6 Electrical Characteristics
    7. 6.7 Safety-Related Certifications
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Pre-Production Samples Operating Limits
    3. 7.3 Functional Block Diagram
    4. 7.4 Feature Description
      1. 7.4.1 Power Stage Operation
        1. 7.4.1.1 VDD-COM Voltage Regulation
        2. 7.4.1.2 COM-VEE Voltage Regulation
      2. 7.4.2 Output Voltage Soft Start
      3. 7.4.3 ENA and Power-Good
      4. 7.4.4 Protection Functions
        1. 7.4.4.1 Input Undervoltage Lockout
        2. 7.4.4.2 Input Overvoltage Lockout
        3. 7.4.4.3 Output Undervoltage Protection
        4. 7.4.4.4 Output Overvoltage Protection
        5. 7.4.4.5 Over-Temperature Protection
        6. 7.4.4.6 BSW Pin Faults Protection
    5. 7.5 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 VDD-COM Voltage Regulation
        2. 8.2.2.2 COM-VEE Voltage Regulation and Single Output Configuration
    3. 8.3 System Examples
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Third-Party Products Disclaimer
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

7.4.1 Power Stage Operation

The UCC35131-Q1 module uses a soft-switching full-bridge converter on the primary-side and a passive full-bridge rectifier on the secondary-side. The small integrated transformer operates with a high switching frequency to reduce the size for integrating into the 16-pin SSOP package. The power stage switching frequency is within 16.5MHz to 27MHz. The power stage switching frequency is determined by input voltage with a feed-forward control as illustrated by the figure below. Adapative spread spectrum modulation, ASSM, is used to reduce emissions. ZVS operation is maintained to reduce switching power losses.

The UCC35131-Q1 module creates two regulated outputs. It can be configured as a single output converter, VDD to COM only, or a dual-output converter, VDD to COM and COM to VEE.

These two outputs are controlled independently through hysteretic control. Furthermore, the VDD to COM is the main output, and COM to VEE uses the main output as its input to create a second regulated output voltage.

UCC35131-Q1 VDD-COM Switching Frequency with Respect to Input Voltage Figure 7-1 VDD-COM Switching Frequency with Respect to Input Voltage.