SLUSG22 October   2025 UCC35131-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Insulation Specifications
    6. 6.6 Electrical Characteristics
    7. 6.7 Safety-Related Certifications
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Pre-Production Samples Operating Limits
    3. 7.3 Functional Block Diagram
    4. 7.4 Feature Description
      1. 7.4.1 Power Stage Operation
        1. 7.4.1.1 VDD-COM Voltage Regulation
        2. 7.4.1.2 COM-VEE Voltage Regulation
      2. 7.4.2 Output Voltage Soft Start
      3. 7.4.3 ENA and Power-Good
      4. 7.4.4 Protection Functions
        1. 7.4.4.1 Input Undervoltage Lockout
        2. 7.4.4.2 Input Overvoltage Lockout
        3. 7.4.4.3 Output Undervoltage Protection
        4. 7.4.4.4 Output Overvoltage Protection
        5. 7.4.4.5 Over-Temperature Protection
        6. 7.4.4.6 BSW Pin Faults Protection
    5. 7.5 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 VDD-COM Voltage Regulation
        2. 8.2.2.2 COM-VEE Voltage Regulation and Single Output Configuration
    3. 8.3 System Examples
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Third-Party Products Disclaimer
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

6.4 Thermal Information

THERMAL METRIC(1) UNIT
DHA (SOIC)
16 PINS
RθJA Junction-to-ambient thermal resistance 63.2 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 32.3 °C/W
RθJB Junction-to-board thermal resistance 20.1 °C/W
ΨJA Junction-to-ambient characterization parameter 47.8 °C/W
ΨJB Junction-to-board characterization parameter 20.5 °C/W
ΨJT Junction-to-top characterization parameter 3 °C/W
(1) The thermal resistances (R) are based on JEDEC board, and the characterization parameters (Ψ) are based on the EVM described in the Layout section. For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.