The Device window show a variety of measurements, faults, and settings for the device that are not specific to a channel, see Figure 6-27.

The Thermal window, Figure 6-28, shows the Current Temp which is a reading of the TEMPL/H registers. The TW Limit is a setpoint for the thermal warning limit that is defined in the TWLMT register. If the Current Temp exceeds the TW Limit then the TW bit is set. The Device window also shows the measured voltage of the V5D pin using the internal ADC. The pull-down menu for PWM Div (Hz) selects the PWM frequency that is to be used by both channels if the PWM Source Internal box is selected for that channel. The SLEEP button sets the SLEEP bits such that it goes into a low-power mode yet still keeps all the register information. The Limp Home button opens up a window with the limp home settings, see the Limp Home Mode Window section. The Update button initiates the polling of all the registers and continually refreshes the GUI with the information from the EVM. It is important to note that when using the Update mode, that faults can occur and be visually missed because the register reads clear the faults in the polling cycle. The Read All button performs a single read of all the registers and updates the GUI. The Reg Dump button does a read of all the registers and creates a .txt file with all the register information in the local drive at C:\Texas Instruments\TPS92518, 520, 682 LaunchPad Evaluation Software location. The Reset All button put the TPS92520-Q1 to its factory default settings.

The Faults window, see Figure 6-30, allow for the selection of the Fault Timer duration in ms, which is set by the IFT bits. The Reset Flt Pin button clears the FPINRST bit and release the nFLT pin. The Stdalone box indicates that the STANDALONE bit is set and is in stand alone mode. The V5AUV box indicates that an under voltage fault has occurs at the V5A pin. The TW box indicates an overtemperature thermal warning fault has occurred. The PC box indicates that the PC (power cycle) bit is set, which happens at power up and is considered a fault. The PC bit must be cleared by reading the STATUS3 register and must be cleared before the channels can be enabled. There are several faults that if triggered must be read before operation can continue and they are covered in the Faults window.