This section highlights the benefits of IT-DZT under a dynamic load using the BQ41Z50 Evaluation module. The characteristics of the battery are shown in the table below. These parameters are crucial to configure the gauge as given in the previous sections.

The Data Memory configuration for this implementation is shown in the table below. These parameters ensure accurate gauging and IT-DZT functionality.

• Discharge and charge current thresholds: Set to 100 mA and 50 mA respectively to accurately determine discharge or charge modes during operation. These parameters can be set according to the application. Ensure that both DSG and CHG current thresholds are greater than the quit current threshold. Quit current was kept as default 10mA.
• Term voltage: Set to 2700 mV * 3 cells in series : 8100 mV. This value must be set to the lowest voltage or terminal voltage in the cell manufacturer datasheet.
• Mfg Status Init: Set to 0x18. Send GAUGE_EN and FET_EN commands.
• Taper Current: Set to 269 mA based on a C/20 rate with a 10% overhead. It is recommended to use a C/20 taper current. However, the gauge’s taper current must be 10-15% higher than the charger’s taper current to ensure the gauge has a smooth charge termination before the charger cuts off the charging current.
• Design Capacity: Set to 4680mAh based on cell datasheet.
• Design Voltage: Set to 3860mV × 3 cells in series = 11580mV.
• Design Capacity cWh: Set to [Design Capacity]*[Design Voltage] = 4680mAh × 11580mV ~= 5419cWh.
• Update Status: Set to 0x05. Qmax is already known.
  Note: Based on the descriptions of the Update Status values below, the Update Status could also be set to 0x06 since the internal resistance of the cell is known from the chemID creation. However, the purpose of this exercise is to represent how the gauge accurately tracks the internal impedance of the cell under a dynamic load.

Under [Settings][Configuration], set [Temperature Enable] to the right thermistor pin. In this example, the TS1 pin was used, so [Temperature Enable] was set to 2. The BQ41Z50EVM has 4 thermistors, which must be set based on the thermistor pin being used for the implementation. All unused TS pins must be disabled. Figure 5-8 shows the temperature enable register with the appropriate TS pins enabled.

Figure 5-8 Temperature Enable Register

TS1 is the only thermistor seated on the battery and measuring cell temperature. Disable all other thermistor pins to prevent interference from other temperature readings. Under [Settings][Configuration][Temperature Mode], clear the TS1 mode bit to Cell Temperature mode and set all other TSn modes to FET Temperature mode.

Using the commands tab, reset the gauge to clear VOK and set RDIS temporarily. Ensure the cells are balanced before starting a cycle to avoid inaccurate Depth of Discharge (DoD), State of Charge (SoC) readings, or may even fail to get Qmax updates. It is recommended that RDIS is set during the first cycle to prevent the gauge from getting a resistance update before it gets a Qmax update.

This implementation utilized an Arbin battery tester to execute charge-discharge cycles according to predefined schedules. The custom schedule for this IT-DZT test encompasses charging, resting, discharging as well as a pulse load to simulate rapid charge and discharge sequences. Figure 5-9 below illustrates the charge-relax-discharge cycle. During the discharge routine, the Ra value updates, and the fluctuating load helps determine if the gauge accurately captures resistance changes. By monitoring these rapid transitions, it is possible to assess whether the gauge receives and processes resistance updates effectively, ensuring accurate performance under arbitrary load conditions.

Figure 5-9 Current and Voltage vs Elapsed Time