SLUUD92 June   2025 UCC218200-Q1

 

  1.   1
  2.   Abstract
  3. 1General TI High Voltage Evaluation User Safety Guidelines
  4. 2Module and Gate Driver Compatibility
    1. 2.1 Supported Wolfspeed Modules and Evaluation Platforms
    2. 2.2 Supported Gate Drivers
  5. 3System Overview and Functions
    1. 3.1 Features
    2. 3.2 Specifications
    3. 3.3 PCB Pinout
    4. 3.4 EVM Information
      1. 3.4.1 Primary-Side Power
      2. 3.4.2 Primary-Side I/O and Diagnostics
      3. 3.4.3 Secondary-Side Bias Supply
      4. 3.4.4 Output Stage Gate Loop
      5. 3.4.5 Current Booster
      6. 3.4.6 Short-Circuit Detection System
        1. 3.4.6.1 Short-Circuit Detection - DESAT
        2. 3.4.6.2 Short-Circuit Detection - OC
  6. 4Using the EVM
    1. 4.1 Equipment List and Board Setup
    2. 4.2 Test Setups and Procedures
      1. 4.2.1 Power-On and Bias Supply Check
      2. 4.2.2 Output Switching
  7. 5Hardware Design Files
    1. 5.1 Schematics
    2. 5.2 PCB Layouts
    3. 5.3 Bill of Materials (BOM)
  8. 6Additional Information
    1. 6.1 Trademarks
  9. 7Revision History

3.4.2 Primary-Side I/O and Diagnostics

The primary-side I/O and diagnostic block fulfills the following functions:

  • Provides signal input, including high-side and low-side PWM and RESET, as well as +12-V voltage input to the half-bridge board.
    • If the power and signal inputs are given via the differential board connector, the status output pin of a power MUX, TPS2121, is used to turn on the SN65C1167 dual differential driver and receiver. The dual differential driver and receiver then converts the differential gate driver inputs to single-ended gate driver inputs, and converts single-ended gate driver outputs to differential outputs that will be transmitted to the differential board.
    • If the power and signal inputs are given via the test point hooks on this EVM, the power MUX turns off the SN65C1167 dual differential driver and receiver. This protects the dual differential driver and receiver from damage.
  • Filters out the high frequency noise in the high-side and low-side differential signals through RLC filters.
  • Combines high-side and low-side RDY and nFLT signal into one FLT_OUT signal through an SN74LV21 AND gate.
  • Combines the nRST signal coming from the differential board and the on-board reset button into one RESET signal through an SN74LV21 AND gate.

    The +12-V power supply and the PWM signals should be connected to the same board, either the differential board or the EVM. Failure to do so might result in EVM component damage.

UCC218002QEVM-111
UCC218002QEVM-111 Primary-Side I/OFigure 3-3 Primary-Side I/O