SLUUD92 June   2025 UCC218200-Q1

 

  1.   1
  2.   Abstract
  3. 1General TI High Voltage Evaluation User Safety Guidelines
  4. 2Module and Gate Driver Compatibility
    1. 2.1 Supported Wolfspeed Modules and Evaluation Platforms
    2. 2.2 Supported Gate Drivers
  5. 3System Overview and Functions
    1. 3.1 Features
    2. 3.2 Specifications
    3. 3.3 PCB Pinout
    4. 3.4 EVM Information
      1. 3.4.1 Primary-Side Power
      2. 3.4.2 Primary-Side I/O and Diagnostics
      3. 3.4.3 Secondary-Side Bias Supply
      4. 3.4.4 Output Stage Gate Loop
      5. 3.4.5 Current Booster
      6. 3.4.6 Short-Circuit Detection System
        1. 3.4.6.1 Short-Circuit Detection - DESAT
        2. 3.4.6.2 Short-Circuit Detection - OC
  6. 4Using the EVM
    1. 4.1 Equipment List and Board Setup
    2. 4.2 Test Setups and Procedures
      1. 4.2.1 Power-On and Bias Supply Check
      2. 4.2.2 Output Switching
  7. 5Hardware Design Files
    1. 5.1 Schematics
    2. 5.2 PCB Layouts
    3. 5.3 Bill of Materials (BOM)
  8. 6Additional Information
    1. 6.1 Trademarks
  9. 7Revision History

4.2.2 Output Switching

To perform this test, make sure tests in Section 4.2.1 has been performed and the gate drivers are powered up properly.

  1. Generate two 10kHz 0V-5V complementary PWM waves on two function generator channels. Deadtime can be added between the two PWM waves.

  2. Connect these channel probes to the test points on the EVM; connect the high-side PWM channel probe to HS_PWM and the low-side PWM channel probe to LS_PWM.

  3. Measure the high-side gate voltage with the MMCX connector GATE_HS1, and measure the low-side gate voltage with the MMCX connector GATE_LS1.

  4. GATE_HS1 waveform should match high-side PWM input signal with a small delay (~100ns).

  5. GATE_LS1 waveform should match low-side PWM input signal with a small delay (~100ns).

UCC218002QEVM-111 Test Point Locations for Output Switching CheckFigure 4-2 Test Point Locations for Output Switching Check