SLUUD92 June   2025

 

  1.   1
  2.   Abstract
  3. 1General TI High Voltage Evaluation User Safety Guidelines
  4. 2Module and Gate Driver Compatibility
    1. 2.1 Supported Wolfspeed Modules and Evaluation Platforms
    2. 2.2 Supported Gate Drivers
  5. 3System Overview and Functions
    1. 3.1 Features
    2. 3.2 Specifications
    3. 3.3 PCB Pinout
    4. 3.4 EVM Information
      1. 3.4.1 Primary-Side Power
      2. 3.4.2 Primary-Side I/O and Diagnostics
      3. 3.4.3 Secondary-Side Bias Supply
      4. 3.4.4 Output Stage Gate Loop
      5. 3.4.5 Current Booster
      6. 3.4.6 Short-Circuit Detection System
        1. 3.4.6.1 Short-Circuit Detection - DESAT
        2. 3.4.6.2 Short-Circuit Detection - OC
  6. 4Using the EVM
    1. 4.1 Equipment List and Board Setup
    2. 4.2 Test Setups and Procedures
      1. 4.2.1 Power-On and Bias Supply Check
      2. 4.2.2 Output Switching
  7. 5Hardware Design Files
    1. 5.1 Schematics
    2. 5.2 PCB Layouts
    3. 5.3 Bill of Materials (BOM)
  8. 6Additional Information
    1. 6.1 Trademarks
  9. 7Revision History

3.2 Specifications

Wide bandgap SiC FET based power modules are introduced in power electronics instead of Si IGBT because of their excellent conduction and switching performance. Compact driver board UCC218XXXEVM-111 supports SiC modules by reducing parasitics, minimizing switching loss, EMI and providing full required protection and diagnostics features.

Table 3-1 Electrical Specifications: UCC218002EVM-111
ParameterTest ConditionsMinNomMaxUnit

SUPPLY VOLTAGES AND CURRENTS

VccVCC supply voltage4.55.05.5V
Vdd2u, Vdd2lVDD supply voltages

From transformer and LDO

15

V
Vee2u, Vee2lVEE supply voltages

From transformer and shunt regulator

-4V
DRIVE CURRENT
IohPeak source currentCLOAD = 10nF5 A
IolPeak sink currentCLOAD = 10nF5 A
INPUT/OUTPUT SIGNALS
Vinr, VrstrIN+, IN-, RST/EN rising threshold0.7 x VCCV
Vinf, VrstfIN+, IN-, RST/EN falling threshold0.3 x VCCV
Vinh, VrsthINL+, INU+, RST hysteresis0.1 x VCCV
TIMING PARAMETERS
TriseDrive output rise timeCLOAD = 1.8nF

5

ns
TfallDrive output fall timeCLOAD = 1.8 nF11ns
TpropPropagation delayCLOAD = 100 pF90ns

SHORT CIRCUIT PROTECTION - DESAT

Ichg

Blanking capacitor charging current

500

uA

Tdesatleb

Leading edge blank time

225

ns

Tdesatfil

DESAT deglitch filter

125

ns

Issd

Peak sink soft shutdown peak currentCL = 0.18μF, fS = 1kHz1

A

Vclmpi

Miller Clamp threshold

Reference to VEE

1.5

2.1

2.5

V

Iclmpi

Miller Clamp current

VCLMPI = 0 V, VEE = –2.5 V

2.5

A

ISOLATION
VisoWithstand isolation voltage for gate driverReinforced, 60s5000Vrms
CioBarrier capacitance for gate driver1.2pF
TaOperating Ambient Temperature for gate driver-4025125°C
Figure 3-1 Electrical Specifications: UCC218200EVM-111
Parameter Test Conditions Min Nom Max Unit

SUPPLY VOLTAGES AND CURRENTS
Vcc VCC supply voltage 4.5 5.0 5.5 V
Vdd2u, Vdd2l VDD supply voltages

From transformer and LDO

15

 V
Vee2u, Vee2l VEE supply voltages

From transformer and shunt regulator

 -4 V
DRIVE CURRENT
Ioh Peak source current CLOAD = 10nF 15 A
Iol Peak sink current CLOAD = 10nF 15 A
INPUT/OUTPUT SIGNALS
Vinr, Vrstr IN+, IN-, RST/EN rising threshold 0.7 x VCC V
Vinf, Vrstf IN+, IN-, RST/EN falling threshold 0.3 x VCC V
Vinh, Vrsth INL+, INU+, RST hysteresis 0.1 x VCC V
TIMING PARAMETERS
Trise Drive output rise time CLOAD = 1.8nF

5

 ns
Tfall Drive output fall time CLOAD = 1.8 nF 11 ns
Tprop Propagation delay CLOAD = 100 pF 90 ns

SHORT CIRCUIT PROTECTION - DESAT

Ichg

Blanking capacitor charging current

500

uA

Tdesatleb

Leading edge blank time

200

ns

Tdesatfil

DESAT deglitch filter

125

ns

Issd

 Peak sink soft shutdown peak current CL = 0.18μF, fS = 1kHz 2.5

A

Vclmpi

Miller Clamp threshold

 Reference to VEE

1.5

2.1

2.5

V

Iclmpi

Miller Clamp current

 VCLMPI = 0 V, VEE = –2.5 V

4

A
ISOLATION
Viso Withstand isolation voltage for gate driver Reinforced, 60s 5000 Vrms
Cio Barrier capacitance for gate driver 1.2 pF
Ta Operating Ambient Temperature for gate driver -40 25 125 °C