SLVSI75 May   2026 DRV8218

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Transient Current Capability
    7. 6.7 Timing Diagrams
    8. 6.8 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 External Components
    4. 7.4 Feature Description
      1. 7.4.1 Control Modes
        1. 7.4.1.1 PWM Control Mode (MODE = 0)
        2. 7.4.1.2 PH/EN Control Mode (MODE = 1)
        3. 7.4.1.3 Independent Half-Bridge Control Mode (MODE = Hi-Z)
      2. 7.4.2 Pin Diagrams
        1. 7.4.2.1 Logic-Level Inputs
        2. 7.4.2.2 Tri-Level Input
      3. 7.4.3 Protection Circuits
        1. 7.4.3.1 Supply Undervoltage Lockout (UVLO)
        2. 7.4.3.2 OUTx Overcurrent Protection (OCP)
        3. 7.4.3.3 Thermal Shutdown (TSD)
    5. 7.5 Device Functional Modes
      1. 7.5.1 Active Mode
      2. 7.5.2 Low-Power Sleep Mode
      3. 7.5.3 Fault Mode
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Full-Bridge Driving
        1. 8.2.1.1 Supply Voltage
        2. 8.2.1.2 Control Interface - Full Bridge
        3. 8.2.1.3 Low-Power Operation
        4. 8.2.1.4 Application Curves
      2. 8.2.2 Half-Bridge Driving
        1. 8.2.2.1 Control Interface
        2. 8.2.2.2 Low-Power Operation
        3. 8.2.2.3 Application Curves
      3. 8.2.3 Parallel Multiple Drivers
      4. 8.2.4 Dual-Coil Relay Driving
        1. 8.2.4.1 Control Interface
        2. 8.2.4.2 Low-Power Operation
        3. 8.2.4.3 Application Curves
      5. 8.2.5 Current Sense
        1. 8.2.5.1 Design Requirements
        2. 8.2.5.2 Detailed Design Procedure
          1. 8.2.5.2.1 Shunt Resistor Sizing
          2. 8.2.5.2.2 RC Filter
    3. 8.3 Current Capability and Thermal Performance
      1. 8.3.1 Power Dissipation and Output Current Capability
    4. 8.4 Power Supply Recommendations
      1. 8.4.1 Bulk Capacitance
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Mechanical, Packaging, and Orderable Information

7.1 Overview

The DRV8218 is a fully integrated H-bridge motor driver delivering over 4A DC current in a compact 2×2mm WSON package. Four integrated N-Channel power MOSFETs provide a combined RDS(on) of just 80mΩ, saving up to 93% board area compared to equivalent discrete FET solutions while eliminating external gate resistors, flyback diodes, and bootstrap capacitors.

A tripler charge pump architecture with all capacitors integrated on-chip maintains stable RDS(on) across the full 1.8V to 11V motor supply range, even at low battery voltages where discrete solutions degrade. The 1.8V minimum supply makes the DRV8218 well suited for single-cell Li-ion, multi-cell alkaline, and other battery-powered applications. The fully integrated charge pump also enables 100% PWM duty cycle operation and supports PWM frequencies up to 100kHz.

The device supports three control interface modes - PWM (IN1/IN2), phase/enable (PH/EN), and independent half-bridge - selected via the tri-level MODE pin. PH/EN mode enables bidirectional motor control from a single microcontroller timer peripheral. In half-bridge mode, both outputs can be paralleled to achieve 20mΩ effective RDS(on) for high-current single-load applications. Automatic dead-time generation in all modes simplifies firmware and speeds time to market by removing the need for manually matched FET timing to prevent shoot-through.

Rather than requiring a dedicated sleep GPIO, the device automatically enters sleep after inputs remain inactive for tAUTOSLEEP (7–14 ms), reducing quiescent current to under 120nA to extend battery life. Alternatively, the VCC pin can be driven from a microcontroller GPIO to enter sleep via UVLO.

On-chip protection - including overcurrent protection (OCP), thermal shutdown (TSD), and undervoltage lockout (UVLO) - guards against short circuits, overheating, and supply drops, increasing system reliability and potentially eliminating the need for an external fuse. All faults recover automatically. In half-bridge mode, OCP operates independently per output, allowing the unaffected channel to continue normal operation during a single-channel fault.

The DRV8218 is part of a pin-to-pin compatible family of drivers with scalable RDS(on) and supply voltage options. See Section 4 for a full device comparison.