SLVSI75 May 2026 DRV8218
ADVANCE INFORMATION
The DRV8218 provides three modes to support different control schemes with the PH/IN1 and EN/IN2 pins. The MODE pin selects the control interface mode by setting the pin either logic low, logic high, or Hi-Z as shown in Table 7-2. The MODE pin state is not latching, so the mode can be changed during operation.
| MODE STATE | CONTROL MODE |
|---|---|
| MODE = Logic Low | PWM |
| MODE = Logic High | PH/EN |
| MODE = Hi-Z | Independent Half-Bridge |
The inputs can accept DC or pulse-width modulated (PWM) voltage signals with duty cycles from 0% to 100%. The PH/IN1, and EN/IN2 pins have internal pulldown resistors to keep the outputs Hi-Z if no inputs are present (the only exception is half-bridge mode, where OUTx = LOW if INx is floating).
The following sections show the truth tables for each control mode. Additionally, the DRV8218 automatically handles the dead-time generation when switching between the high-side and low-side MOSFET of a half-bridge. Figure 7-2 describes the naming and configuration for the various H-bridge states described in the following sections.
Figure 7-2 H-bridge
states